Bonding pad on a semiconductor chip
AssigneeUnited Microelectronics Corp.
InventorsHermen Liu, Yimin Huang
Life of this patent
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Abstract
The present invention provides a bonding pad on a semiconductor chip such that peeling of bonding pads during interconnection in the packaging process is avoided. The bonding pad is used to electrically connect an integrated circuit in the semiconductor chip with an external circuit. The semiconductor chip comprises a first dielectric layer positioned in a predetermined area on the surface of the semiconductor chip, a second dielectric layer positioned on the surface of the semiconductor chip outside the predetermined area wherein the first dielectric layer is harder than the second dielectric layer, and a bonding pad positioned on the first dielectric layer for electrically connecting anintegrated circuit (IC) in the semiconductor chip with an external circuit.
Claims6
A semiconductor chip comprising:
- a substrate;
- a first dielectric layer positioned in a predetermined area on the surface of the substrate;
- a second dielectric layer positioned on the surface of the substrate outside the predetermined area wherein the first dielectric layer is harder than the second dielectric layer;
- and
- a bonding pad positioned on the first dielectric layer for electrically connecting an integrated circuit (IC) in the substrate with an external circuit.
Dependencies are inferred from the claim text.