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US 6,388,294 B1Granted
Integrated circuit using damascene gate structure
AssigneeInternational Business Machines Corporation
InventorsCarl Radens, Mary E. Weybright, Gary Bronner
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Abstract
An integrated circuit device is presented. The integrated circuit device of the present invention comprises a semiconductor substrate having a combination of transistor gates formed using a conventional dielectric-capped gate stack for self-aligned diffusion contacts (SAC) as well as a transistor gate structure formed by removing the dielectric-cap gate stack from selected regions of the semiconductor substrate and replacing the dielectric-cap gate stack with a second gate conductor which is patterned using a damascene process.
Claims10
An integrated circuit device, comprising:
- a semiconductor substrate;
- first gate electrodes formed on the semiconductor substrate;
- and
- at least one second gate electrode formed at a selected region of the semiconductor substrate by stripping one of the first gate electrodes to the semiconductor substrate and forming the second gate electrode by a damascene process in place of the removed first gate electrode.
1 more element
Dependencies are inferred from the claim text.