Distributed MOSFET structure with enclosed gate for improved transistor size/layout area ratio and uniform ESD triggering
AssigneeWinbond Electronics Corp.
InventorShi-Tron Lin
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Abstract
A MOSFET structure uses angled poly-gate segments positioned between drain and source diffusion regions such that the entire continuous gate element structure is within the active region in a substrate. The gate-to-source diffusion edges are continuous along the gate body, so as to cascade the snap-back action to enhance uniform turn on of the entire gate element during an ESD event. The angled gate segments provide a total gate-to-area ratio greater than that of a multi-finger-gate configuration within an equal size active region. In addition, the gate signal RC delay is sufficient to provide noise suppression of the output voltage when the MOSFET is used as a high current-drive CMOS output buffer.
Claims27
A MOSFET structure for enhancing uniform poly-gate turn-on during an ESD event, comprising:
- an active region within a substrate,
- a plurality of first doped regions of a first impurity type and at least a second doped region of the first impurity type within said active region, and
- a continuous poly-gate element comprising a plurality of interconnected closed polygonal loops inter-positioned between said plurality of first doped regions and said second doped region, such that a continuous gate-to-second-doped-region edge is formed along an entire outer edge of said poly-gate element, and with said first doped regions being individually surrounded by inner edges of said poly-gate polygonal loops, said poly-gate element being completely disposed within said active region.
An ESD protection structure for enhancing uniform ESD current distribution during an ESD event, comprising:
- an active region within a substrate,
- a plurality of first doped regions of a first impurity type and at least a second doped region of the first impurity type within said active region,
- said first doped regions and said second doped region being spaced apart by a continuous separation region,
- said separation region comprising a plurality of interconnected loops inter-positioned between said plurality of first doped regions and said second doped region, such that a continuous separation-region-to-second-doped-region edge is formed along an entire outer edge of said separation region, said separation region being completely disposed within said active region.
Dependencies are inferred from the claim text.