Fabrication of MIM capacitor in copper damascene process
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsSyun-Ming Jang, Mong-Song Liang
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AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsSyun-Ming Jang, Mong-Song Liang
Estimating the term…
A method for forming an MIM capacitor, comprising the following steps. A semiconductor structure having an exposed lower metal damascene is provided. A capacitor layer is formed over the semiconductor structure and the exposed lower metal damascene. An organic etch stop layer is formed upon the capacitor layer. An IMD layer is formed upon the organic etch stop layer. The IMD layer is etched with a first etch highly selective to the IMD layer as compared to the organic etch stop layer, to form an IMD trench exposing a portion of the organic etch stop layer. The exposed portion of the organic etch stop layer is etched with a second etch method highly selective to the exposed portion of the organic etch stop layer as compared to the capacitor layer, to expose a portion of the capacitor layer. An upper metal damascene is formed upon the exposed portion of the capacitor layer and within the IMD trench to complete formation of the MIM capacitor.
A method for forming an MIM capacitor, comprising the steps;
A method for forming an MIM capacitor, comprising the steps;
A method for forming an MIM capacitor, comprising the steps;
Dependencies are inferred from the claim text.