# US 6,387,761 B1 · Anneal for enhancing the electrical characteristic of semiconductor devices

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- Number: US 6,387,761 B1
- Document ID: US6387761B1
- Status: Granted
- Kind: B1
- Application number: 09/499,336
- Filed: 2000-02-04
- Granted: 2002-05-14
- Earliest claimed: 1998-09-14
- Assignees: Applied Materials, Inc.; Vanguard Semiconductor Corporation
- Inventors: Wong-Cheng Shih; Pravin K. Narwankar; Randall S. Urdahl; Turgut Sahin
- Web page: https://patentgrep.com/patent/US6387761B1

## CPC

- H10D 64/0134: {with a treatment, e.g. annealing, after the formation of the insulator and before the formation of the conductor}
- H10D 64/01342: {by deposition, e.g. evaporation, ALD or laser deposition (H10D64/01344 takes precedence)}
- H10D 64/01344: {in a nitrogen-containing ambient, e.g. N2O oxidation}
- H10D 64/685: {being perpendicular to the channel plane}
- H10D 64/691: {comprising metallic compounds, e.g. metal oxides or metal silicates (insulators comprising nitrogen H10D64/693)}
- H10D 64/693: {the insulator comprising nitrogen, e.g. nitrides, oxynitrides or nitrogen-doped materials}
- H10D 1/684: {the dielectrics comprising multiple layers, e.g. comprising buffer layers, seed layers or gradient layers}
- H10P 14/6316: {Formation by nitridation, e.g. nitridation of the substrate}
- H10P 14/6322: {Formation by thermal treatments (formation by plasma treatment H10P14/6319)}
- H10P 14/6334: {using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition (deposition by physical ablation of a target H10P14/6329)}
- H10P 14/6529: {by exposure to a gas or vapour}
- H10P 14/69433: {the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A method for improving the interface between a silicon nitride film and a silicon surface is described. According to the present invention a silicon nitride film is formed on a silicon surface of a substrate. While said substrate is heated the silicon nitride film is exposed to an ambient comprising hydrogen (H2). In a prefered embodiment of the present invention the ambient comprises H2 and N2.

## Claims

### Claim 1

A method of forming a semiconductor transistor comprising steps of:
exposing a substrate having a silicon nitride film formed on a silicon surface to an ambient comprising hydrogen (H2) and nitrogen (N2) while heating said substrate; and
forming a dielectric layer on said ambient exposed silicon nitride film,
forming a gate electrode over said dielectric layer; and
forming a pair of source/drain regions on opposite sides of said gate electrode.

### Claim 2 (depends on 1)

The method of claim 1 wherein said ambient comprises less than 10% hydrogen by volume and more than 90% nitrogen by volume.

### Claim 3 (depends on 1)

The method of claim 1 further comprising the step of heating said substrate to a temperature between 700-850° C. while exposing said silicon nitride film to said ambient.

### Claim 4 (depends on 1)

The method of claim 1 wherein said silicon surface is a doped polysilicon film.

### Claim 5 (depends on 1)

The method of claim 1 wherein said silicon surface monocrystalline silicon.

### Claim 6 (depends on 1)

The method of claim 1 wherein said silicon nitride film has a thickness between 10-25 Å.

### Claim 7 (depends on 1)

The method of claim 1 wherein said dielectric is a transition metal oxide dielectric.

### Claim 8 (depends on 1)

The method of claim 1 wherein said silicon nitride film is exposed aid ambient for between 60-180 seconds.

### Claim 9 (depends on 1)

The method of claim 1 further comprising the step of annealing said electric layer.

### Claim 10

A method of forming a metal insulated semiconductor (MIS) transistor, said method comprising the steps of:
forming a silicon nitride film on a monocrystalline silicon surface of a substrate;
heating said substrate to a temperature between 700-850° C;
while heating said substrate, exposing said substrate to an ambient comprising hydrogen (H2) and nitrogen (N2);
forming a dielectric layer on said ambient exposed silicon nitride layer;
forming a gate electrode over said dielectric layer; and
forming a pair of source/drain regions on opposite sides of said gate electrode.