Tri-layer process for forming TFT matrix of LCD with reduced masking steps

A process for forming a thin film transistor (TFT) matrix for a liquid crystal display (LCD), comprising steps of:

• providing a substrate made of an insulating material;
• forming a first conductive layer on a first side of said substrate, and using a first masking and patterning procedure to remove a portion of said first conductive layer to define a scan line and a gate electrode of a TFT unit;
• successively forming an insulation layer, a semiconductor layer, an etch stopper layer, and a photoresist layer on said substrate with said scan line and said gate electrode;
• providing an exposing source from a second side of said substrate opposite to said first side by using said scan line and said gate electrode as a shield to obtain an exposed area and an unexposed area;
• removing said photoresist and said etch stopper layer of said exposed area so that the remaining portion of said etch stopper layer in said unexposed area has a specific shape substantially identical to the shape of said scan line together with said gate electrode;
• using a second masking and patterning procedure to remove another portion of said etch stopper layer of said specific shape, and then removing a portion of said semiconductor layer to define a channel region;
• successively forming a doped semiconductor layer and a second conductive layer on said substrate, and using a third masking and patterning procedure to remove a portion of said second conductive layer to define data and connection lines;
• removing a portion of said doped semiconductor layer with the remaining portion of said second conductive layer and said etch stopper layer as a shield to define source/drain regions;
• forming a passivation layer on said substrate, and using a fourth masking and patterning procedure to remove a portion of said passivation layer to define a contact window;
• and
• forming a transparent conductive layer on said substrate, and using a fifth masking and patterning procedure to remove a portion of said transparent conductive layer to define a pixel electrode region which is connected to said data and connection lines through said contact window.

A process for forming a thin film transistor (TFT) matrix for a liquid crystal display (LCD), comprising steps of:

• providing a glass substrate;
• forming a first conductive layer on a first side of said substrate, and using a first masking and patterning procedure to remove a portion of said first conductive layer to define a scan line and a gate electrode of a TFT unit;
• successively forming a lower silicon nitride layer, an intrinsic amorphous silicon layer, an upper silicon nitride layer, and a photoresist layer on said substrate with said scan line and said gate electrode;
• providing an exposing source from a second side of said substrate opposite to said first side by using said scan line and said gate electrode as a shield to obtain an exposed area and an unexposed area;
• removing said photoresist and said upper nitride silicon layer of said exposed area so that the remaining portion of said upper silicon nitride layer in said unexposed area has a specific shape substantially identical to the shape of said scan line together with said gate electrode, and functions as an etch stopper structure;
• successively forming a highly doped n+-microcrystalline silicon layer and a second conductive layer on said substrate, and using a second masking and patterning procedure to remove a portion of said second conductive layer to define data and connection lines and an isolation window area;
• removing a portion of said highly doped n+-microcrystalline silicon layer and a portion of said intrinsic amorphous silicon layer with the remaining portion of said second conductive layer and said etch stopper structure as a shield to define source/drain regions and a channel region;
• forming a further silicon nitride layer as a passivation layer on said substrate, and using a third masking and patterning procedure to remove a portion of said passivation layer to define a contact window and to expose said isolation window area;
• removing a portion of said etch stopper structure and another portion of said intrinsic amorphous silicon layer in said isolation window area with the remaining portion of said passivation layer as a shield to form an isolation window for cutting off the connection of said TFT unit with said data line through said intrinsic amorphous silicon layer;
• and
• forming a transparent conductive layer on said substrate, and using a fourth masking and patterning procedure to remove a portion of said transparent conductive layer to define a pixel electrode region which is connected to said data and connection lines through said contact window.