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US 6,387,572 B1Granted
Low CTE substrate for reflective EUV lithography
AssigneeIntel Corporation
InventorsTom X. Tong, Kramadhati V. Ravi
Life of this patent
Estimating the term…
Abstract
A substrate for reflective EUV lithography that includes a first layer that has a low coefficient of thermal expansion and a second layer, formed on the first layer, that has a high surface quality. The second layer may have a coefficient of thermal expansion that is higher than the coefficient of thermal expansion of the first layer.
Claims14
A substrate for reflective EUV lithography comprising:
- a first layer that has a low coefficient of thermal expansion, and
- a second layer, formed on the first layer, that has a high surface quality, that is between about 0.2 and about 5 microns thick, and that consists essentially of at least one of the materials selected from the group consisting of silicon, sapphire, germanium, beryllium, and silicon carbide.
A photolithographic mask comprising:
- means for defining features that are less than about 0.10 micron wide on an integrated circuit, the means for defining such features being formed on
- a silicon containing layer that consists essentially of silicon, that is substantially free of defects that are larger than 0.10 micron, and that is substantially free of deviations in surface topology that exceed 10 nm, the silicon layer directly contacting
- a glass layer having a coefficient of thermal expansion that is substantially less than 2.0 ppm/° C. at temperatures employed during EUV lithography.
A method for making a substrate for making a device used in EUV reflective lithography comprising:
- forming on a first layer, which has a low coefficient of thermal expansion, a second polishable layer;
- then
- polishing the second layer until it is substantially free of deviations in surface topology that exceed 10 nm.
Dependencies are inferred from the claim text.