System to optimize packet buffer utilization via selectively partitioned transmit and receive buffer portions

A network interface card for interfacing between a network device that is coupled to a bus, comprising:

• a bus interface circuit coupled to the bus;
• a memory coupled to the bus interface circuit, wherein the memory is configurable to include a transmit buffer of a certain size range and a receive buffer of a certain size range, wherein,
• the transmit buffer that includes addresses designated by a start of read packet pointer, a read pointer, and an end of read packet pointer, wherein the read pointer progresses in a first direction through the addresses, and wherein the end of read packet pointer includes an address;
• the receive buffer that includes addresses designated by a start of write packet pointer, and a write pointer, wherein the write pointer progresses in a second direction through the addresses toward the read pointer;
• and
• wherein an address at which the read pointer and the write pointer meet is a boundary between the transmit buffer and the receive buffer that determines a size of the transmit buffer and a size of the receive buffer;
• and
• a controller coupled to the memory, comprising,
• first circuitry for generating a new write pointer, comprising an arithmetic and logic unit that performs operations on the start of write packet pointer, and the write pointer;
• second circuitry for generating a new read pointer, comprising an arithmetic and logic unit that performs operations on the start of read packet pointer, the end of read packet pointer, and the read pointer, wherein the first circuitry further performs operations to reset the write pointer to an initial value when the write pointer reaches the boundary, and the second circuitry further performs operations to reset the read pointer to an initial boundary when the read pointer reaches the boundary;
• circuitry for preventing an incomplete write packet from being written to the buffer memory, wherein preventing includes determining that a complete write packet will not be written to available space in the buffer memory, resetting the start of write pointer to a location stored in the start of write packet pointer, and discarding the incomplete write packet;
• and
• circuitry for determining when a read packet is completely read, wherein determining includes comparing the read pointer with the end of read packet pointer and;
• a media interface control circuit coupled to the memory, the controller, and the network.

A method for controlling relative sizes of a transmit buffer and a receive buffer in a memory of a fixed size in a network interface card, comprising:

• preconfiguring the relative sizes by specifying a size range for the transmit buffer and a size range for the transmit buffer;
• generating a write pointer that points to a location of the receive buffer currently written to, wherein the write pointer points to a succession of addresses in a first direction in the memory;
• generating a read pointer that points to a location of the transmit buffer currently written to, wherein the read pointer points to a succession of addresses in a second direction in the memory;
• when the write pointer reaches an address adjacent to the read pointer, resetting the write pointer to an initial write pointer address;
• when the write pointer reaches an address that indicates the limit of the size range for the receive buffer, resetting the write pointer to the initial write pointer address;
• when the read pointer reaches an address adjacent to the write pointer, resetting the read pointer to an initial read pointer address;
• when the read pointer reaches an address that indicates the limit of the size range for the transmit buffer, resetting the read pointer to the initial read pointer address;
• and
• determining when a read packet is completely read, including comparing an address of the read pointer with an address of an end of read packet pointer.