FPGA customizable to accept selected macros
AssigneeXilinx, Inc.
InventorsJames L. Burnham, Gary R. Lawman, Joseph D. Linoff
Life of this patent
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Abstract
A field programmable gate array (FPGA) is provided that can selectively accept or reject selected software (macros). Specifically, configuration data for the FPGA is passed through a configuration port to a decoder. The decoder processes the configuration data to detect locked macros. If a locked macro is detected, the decoder attempts to unlock the locked macro using one or more keys stored in a key table of the FGPA. If an appropriate key is in the key table, the decoder unlocks the locked macro to configure the FPGA. The keys can be pre-programmed into the FGPA by the macro vendor. If configuration data containing a locked macro is used with an FPGA without the appropriate key, configuration of the FPGA fails.
Claims13
A field programmable gate array (FPGA), comprising:
- a decoder coupled to receive configuration data having a first locked macro;
- and
- a key table coupled to said decoder, said key table storing a first key for unlocking said first locked macro.
A field programmable gate array (FPGA), comprising:
- a decoder coupled to receive configuration data having a first locked macro;
- and
- a key table coupled to said decoder, said key table configured to store a first key for unlocking said first locked macro.
Dependencies are inferred from the claim text.