Signal generator, and method
AssigneeMotorola, Inc.
InventorsMichael Zarubinsky, Konstantin Berman, Eliav Zipper
Life of this patent
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Abstract
A signal generator (100) receives an input clock signal (X1) at a first frequency (F1) and derives an output clock signal (Y) at a second frequency (FY). An arrangement (110) using a first intermediate signal (Z) receives the input clock signal (X1) and provides a second intermediate signal (X2) by selectively providing transitions (119) of the second intermediate signal (X2) at time intervals (T2(n)) that are determined by a variable number (A+P(n)) of periods (TZ) of the first intermediate signal (Z). The second intermediate signal (X2) has a frequency (F2) that is in average (F′2) higher than the first frequency (F1). A phase-looked loop (PLL) circuit (180) locks at this average frequency (F′2) and provides the output clock signal (Y).
Claims18
A signal generator that receives an input clock signal at a first frequency and derives an output clock signal at a second frequency, said second frequency being higher than said first frequency, said signal generator comprising:
- an arrangement using a first intermediate clock signal, said arrangement receiving said input clock signal and providing a second intermediate clock signal by selectively providing transitions of said second intermediate clock signal at time intervals that are determined by a variable number of periods of said first intermediate clock signal, said second intermediate clock signal having a third frequency with an average higher than said first frequency, said average of said third frequency being related to said first frequency by a first factor;
- and
- a phase-looked loop circuit that locks at said average of said third frequency and provides said output clock signal, said second frequency of said output signal being related to said average of said third frequency of said second intermediate clock signal by a second factor.
A method to derive an output clock signal from an input reference clock signal, said method comprising the following steps:
- generating a first intermediate clock signal;
- providing a second intermediate clock signal by counting periods of said first intermediate clock signal wherein the number of periods of said first intermediate clock signal in said second intermediate clock signal varies and wherein the spectrum of said second intermediate clock signal is being shaped;
- decimating said second intermediate clock signal to a feedback clock signal at substantially the same frequency as said input reference clock signal;
- calculating a numeric representation of the phase difference between said input reference clock signal and said feedback clock signal by counting periods of said first intermediate clock signal;
- using said numeric representation to adjust said number of periods of said first intermediate clock signal in said second intermediate clock signal;
- and
- filtering said second intermediate clock signal to said output signal with a transfer function that is inverse to said spectrum.
Dependencies are inferred from the claim text.