Method and apparatus for computing a sum of packed data elements using SIMD multiply circuitry
AssigneeIntel Corporation
InventorsMohammad A. Abdallah, Vladimir Pentkovski
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Abstract
A method and apparatus that adds each one of multiple elements of a packed data together to produce a result. According to one such a method and apparatus, each of a first set of portions of partial products is produced using a first set of partial product selectors in a multiplier, each of the first set of portions of the partial products being zero. Each of the multiple elements is inserted into one of a second set of portions of the partial products using a second set of partial product selectors, each of the second set of portions of the partial products being aligned. Each of the multiple elements are added together to produce the result including a field having the sum of the multiple elements.
Claims32
A method comprising:
- producing a plurality of partial products in a multiplier having a plurality of partial product selectors;
- inserting each element of a first plurality of elements of a first packed data into bit positions of one or more of the plurality of partial products by using partial product selectors corresponding to the bit positions;
- and
- adding the first plurality of elements together to produce a first result including a field comprising a sum of the first plurality of elements, said field having a least significant bit.
An apparatus comprising:
- a multiplier to produce a plurality of partial products;
- a plurality of partial product selectors to insert an element of a first plurality of elements of a first packed data into and in substitution for bit positions of one or more of the plurality of partial products by using partial product selectors corresponding to the bit positions;
- and
- an adder to receive the plurality of partial products and produce a first result including a field containing a sum of the first plurality of elements.
An apparatus comprising:
- multiplier to generate a plurality of partial products to produce a product of multiplication having M×N bits, wherein the number M equals P×Q and the number N equals R×Q;
- a plurality of partial product selectors to insert an element of a first plurality of elements, each of the plurality of elements having Q bits, into and in substitution for Q bit values in bit positions of one or more of a plurality of partial products by using partial product selectors corresponding to the bit positions;
- and
- an adder to receive the plurality of partial products and to produce a first result including a field containing a sum of S elements of the plurality of elements, wherein S is greater than P.
Dependencies are inferred from the claim text.