Method of etching silicon nitride by a mixture of CH2 F2, CH3F or CHF3 and an inert gas
AssigneeFujitsu Limited
InventorTadashi Oshima
Life of this patent
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Abstract
There are included steps of forming a silicon nitride layer on a silicon layer or a silicon oxide layer, loading the silicon layer or the silicon oxide layer and the silicon nitride layer in a dry etching atmosphere, and selectively etching the silicon nitride layer with respect to the silicon layer or the silicon oxide layer by flowing a fluorine gas consisting of any one of CH2F2, CH3F, or CHF3 and an inert gas to the dry etching atmosphere. Hence, in the etching process of the silicon nitride layer, the etching selectivity of the silicon nitride layer to Si or SiO2 can be enhanced and also etching anisotropy can be enhanced.
Claims10
A method of etching a silicon nitride layer comprising the steps of:
- forming a silicon nitride layer on a silicon layer or a silicon oxide layer above a substrate;
- loading the silicon layer or the silicon oxide layer and the silicon nitride layer in a dry etching atmosphere;
- and
- selectivity etching the silicon nitride layer with respect to the silicon layer or the silicon oxide layer by flowing a fluorine compound gas consisting of any one of CH2F2, CH3F, and CHF3 and an inert gas to the dry etching atmosphere,
- wherein a flow rate of the fluorine compound gas is set to 5 to 50 sccm, a flow rate of the inert gas is set more than three times a flow rate of the fluorine compound gas, a pressure of the dry etching atmosphere is set to 10 to 500 mTorr, and a RF power applied to the silicon nitride layer is set to 1.1 to 5.5 W/cm2, and a temperature of said substrate is set 20° C. to 95° C. so as to enhance an etching selectivity of the silicon nitride layer with respect to the silicon layer or the silicon oxide layer.
A method of manufacturing a semiconductor device comprising the steps of:
- forming a plurality of gate electrodes at a distance on a semiconductor substrate separately;
- forming insulating side walls on side surfaces of the gate electrodes;
- forming a silicon nitride layer to cover the insulating side walls, the gate electrodes, and the semiconductor substrate;
- forming an interlayer insulating layer on the silicon nitride layer;
- forming contact holes vertically between the gate electrodes by patterning the interlayer insulating layer;
- and
- etching the silicon nitride layer via the contact holes in an atmosphere into which a fluorine compound gas consisting of any one of CH2F2, CH3F, and CHF3 and an inert gas are introduced,
- wherein a pressure of the atmosphere is set to 250 mTorr or more, and a flow rate of the fluorine compound gas is set to ⅕ or less of a flow rate of the inert gas, so as to enhance both an anisotropic etching in a vertical direction and an etching selectivity of the silicon nitride layer with respect to the silicon layer or the silicon oxide layer.
A method of manufacturing a semiconductor device comprising the steps of:
- forming gate electrodes in a device forming region of a silicon substrate via an insulating layer;
- forming an insulating layer made of a silicon nitride or silicon nitride oxide to cover the gate electrodes and the device forming region;
- and
- etching the insulating layer in a vertical direction in an atmosphere into which a fluorine compound gas consisting of any one of CH2F2, CH3F, and CHF3 and an inert gas are introduced, so as to remain the insulating layer on side surfaces of the electrodes as side walls,
- wherein a flow rate of the fluorine compound gas is set to 5 to 50 sccm, a flow rate of the inert gas is set more than three times a flow rate of the fluorine compound gas, a pressure of the dry etching atmosphere is set to 10 to 500 mTorr, and a RF power applied to the silicon nitride layer is set to 350 to 700 W, and a temperature of said substrate is set 20° C. to 95° C. so as to enhance an etching selectivity of the silicon nitride layer with respect to the silicon layer or the silicon oxide layer.
A method of manufacturing a semiconductor device comprising the steps of:
- forming grooves in a semiconductor substrate to be adjacent to a device forming region of the semiconductor substrate;
- filling buried insulating material made of silicon oxide in the grooves;
- forming a gate electrode on the device forming region of the semiconductor substrate via a gate insulating layer;
- forming impurity diffusion layers on side surfaces of the gate electrode on the semiconductor substrate;
- forming a silicon nitride layer to cover the impurity diffusion layer, the buried insulating material, and the gate electrode;
- and
- etching partially the silicon nitride layer in an atmosphere into which a fluorine compound gas consisting of any one of CH2F2, CH3F, and CHF3 and an inert gas are introduced, so as to form a contact hole in a region spreading from the groove to the impurity diffusion layer,
- wherein a flow rate of the fluorine compound gas is set to 5 to 50 sccm, a flow rate of the inert gas is set more than three times a flow rate of the fluorine compound gas, a pressure of the dry etching atmosphere is set to 10 to 500 mTorr, and a RF power applied to the silicon nitride layer is set to 350 to 700 W, and a temperature of said substrate is set 20° C. to 95° C. so as to enhance an etching selectivity of the silicon nitride layer with respect to the silicon layer or the silicon oxide layer.
A method of etching a silicon nitride layer comprising the steps of:
- forming a silicon nitride layer on a silicon layer or a silicon oxide layer above a substrate;
- loading the silicon layer or the silicon oxide layer and the silicon nitride layer in a dry etching atmosphere;
- and
- selectivity etching the silicon nitride layer with respect to the silicon layer or the silicon oxide layer by flowing a fluorine compound gas consisting of any one of CH2F2, CH3F, and CHF3 and an inert gas to the dry etching atmosphere,
- wherein an anisotropy of the etching, an etching rate of the silicon nitride layer, and an etching selectivity of the silicon nitride layer with respect to the silicon layer or the silicon oxide layer are simultaneously enhanced by controlling a flow rate of the fluorine compound gas.
Dependencies are inferred from the claim text.