Process for manufacturing buried channels and cavities in semiconductor material wafers
AssigneeSTMicroelectronics S.r.l.
InventorsGabriele Barlocchi, Flavio Villa, Pietro Corona
Life of this patent
Estimating the term…
Loading patent…
AssigneeSTMicroelectronics S.r.l.
InventorsGabriele Barlocchi, Flavio Villa, Pietro Corona
Estimating the term…
A process of forming on a monocrystalline-silicon body an etching-aid region of polycrystalline silicon; forming, on the etching-aid region a nucleus region of polycrystalline silicon surrounded by a protective structure having an opening extending as far as the etching-aid region; TMAH-etching the etching-aid region and the monocrystalline body to form a tub-shaped cavity; removing the top layer of the protective structure; and growing an epitaxial layer on the monocrystalline body and the nucleus region. The epitaxial layer, of monocrystalline type on the monocrystalline body and of polycrystalline type on the nucleus region, closes upwardly the etching opening, and the cavity is thus completely embedded in the resulting wafer.
A process for manufacturing unfilled buried cavities in semiconductor material wafers, comprising:
A process for manufacturing unfilled buried cavities in semiconductor material, comprising:
A process for manufacturing buried cavities and semiconductor wafers, comprising:
A process for manufacturing buried cavities in semiconductor material wafers, comprising:
A process for manufacturing buried cavities in semiconductor material, comprising:
A process for manufacturing buried cavities in semiconductor material, comprising:
Dependencies are inferred from the claim text.