Audio and video decoder circuit and system

An integrated circuit, comprising:

• a transport packet parsing circuit for receiving a transport data packet stream,
• a central processing unit for initializing said integrated circuit and for processing portions of said data packet stream,
• a ROM circuit for storing data,
• a RAM circuit for storing data,
• an audio decoder circuit for decoding audio portions of said data packet stream,
• a video decoder circuit for decoding video portions of said data packet stream,
• an NTSC/PAL encoding circuit for encoding video portions of said data packet stream,
• an OSD coprocessor circuit for processing OSD portions of said data packets,
• a traffic controller circuit moving portions of said data packet stream between portions of said integrated circuit,
• an extension bus interface circuit,
• a P1394 interface circuit,
• a communication coprocessors circuit,
• an address bus connected to said circuits, and
• a data bus connected to said circuits.

A digital television signal receiver capable of receiving multiple signals, with each signal consisting of a set of digital data packets, comprising:

• decoding means for decoding the incoming digital signals, adapted to identify said data packets so they can be selected to form trains of packets of the same type and a means for processing said packets adapted so as to generate, from packets of the same type, corresponding analog signals and deliver these analog signals to a device for displaying the video signals and transmitting the audio signals, wherein that the decoding means comprises:
• circuitry for extracting a portion of data from each header signal, which is representative of the nature of the corresponding useful signal;
• memory for storing reference data, at addresses each corresponding to one packet type;
• and
• comparison circuitry for comparing the piece of data extracted from each header signal with said reference data stored in memory and delivering data representative of an address to a data processing unit indicating the type of packet, wherein said memory and said comparison circuitry consist of an associative memory adapted to ensure the simultaneous comparison of the piece of data extracted from each header signal with the reference data stored in memory.

A digital television signal receiver capable of receiving multiple signals, with each signal consisting of a set of digital data packets comprising:

• decoding circuitry for decoding the incoming digital signals, adapted to identify said data packets so they can be selected to form trains of packets of the same type and a means for processing said packets adapted so as to generate, from packets of the same type, corresponding analog signals and deliver these analog signals to a device for displaying the video signals and transmitting the audio signals, wherein that the decoding circuitry comprises:
• circuitry for extracting a portion of data from each header signal, which is representative of the nature of the corresponding useful signal;
• memory for storing reference data, at addresses each corresponding to one packet type;
• and
• comparison circuitry for comparing the piece of data extracted from each header signal with said reference data stored in memory and delivering data representative of an address to a data processing unit indicating the type of packet, wherein said memory and said comparison circuitry comprise an associative memory adapted to ensure the simultaneous comparison of the piece of data extracted from each header signal with the reference data stored in memory.