Methods of forming power semiconductor devices having tapered trench-based insulating regions therein

A method of forming a power semiconductor device, comprising the steps of:

• forming first and second trenches at a surface of a substrate having a drift region of first conductivity type therein, said first and second trenches having first and second sidewalls, respectively, that oppose each other and define a mesa therebetween into which the drift region extends;
• lining the first trench with an electrically insulating layer;
• then
• covering the electrically insulating layer in the first trench by filling the first trench with a sacrificial electrically conductive region;
• then
• etching the electrically insulating layer at a first rate while simultaneously etching the sacrificial electrically conductive region at a second rate greater than the first rate, so that as the sacrificial electrically conductive region is etched at the second rate, additional portions of the electrically insulating layer are gradually exposed and etched at the first rate to obtain a nonuniformly thick electrically insulating layer, said nonuniformly thick electrically insulating layer having tapered sidewalls that extend outwardly, relative to the bottom of the trench, and a nonuniform thickness Tins(y) in a range between about 0.5 and 1.5 times Tideal(y), where:
• Tideal(y)|y≧α=εins((2εsEcr/qWmNd)(y−α)+¼Wm)/εs
• and εins is the permittivity of the electrically insulating layer, εs is the permittivity of the drift region, Ecr is the breakdown electric field strength of the drift region, q is the electron charge, Nd is the first conductivity type doping concentration in the drift region, Wm is a width of the mesa, y is the depth, relative to the surface, at which the thickness of the electrically insulating layer is being determined and α is a non-negative constant;
• and then
• refilling the trench with an electrically conductive electrode.