System for contactless testing of printed circuit boards
AssigneeImage Graphics, Inc.
InventorGerald N. Wallmark
Life of this patent
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AssigneeImage Graphics, Inc.
InventorGerald N. Wallmark
Estimating the term…
A system for testing for opens in and shorts between conductor traces on a printed circuit board is provided. The system includes an electron gun assembly for generating an electron beam and an electron optics assembly for directing the electron beam to the traces on the surface of the board, the traces having a reference potential. A grid located proximate to and substantially parallel with the surface of the board is placed at a first potential before the electron beam is directed to a first point on a trace to charge the trace to a first potential. The grid is then placed at a second potential, the second potential being between the reference potential and the first potential, before the electron beam is directed to a second point on the trace to cause emission of secondary electrons. The secondary electrons that reach the grid are collected by the grid, and signal processing electronics and a CPU are used to determine whether or not an open or short exists depending on whether secondary electrons are collected by the grid as the electron beam is directed to various locations on the traces. The position and intensity of the electron beam are controlled by a raster/vector generator. In another aspect, the present invention provides a system having two electron gun assemblies and two grids, one of each placed on each side of a board so that traces on both sides of the board, or traces passing through the board, can be tested simultaneously.
A system for testing for opens in and shorts between conductor traces on a surface of a printed circuit board, the conductor traces having a reference potential, said system comprising:
A system for testing for opens in and shorts between conductor traces on two surfaces of a printed circuit board, the conductor traces having a reference potential, said system comprising:
A method for the contactless testing for opens in a conductor trace passing through a printed circuit board from a first surface to a second surface, the conductor trace having a reference potential, said method comprising the steps of placing a first grid located proximate to and substantially parallel with the first surface of the printed circuit board to a first potential;
A method for the contactless testing for shorts between conductor traces passing through a printed circuit board from a first surface to a second surface, the conductor traces having a reference potential, said method comprising the steps of:
Dependencies are inferred from the claim text.