Digital channelizer with arbitrary output sampling frequency
AssigneeAT&T Corp.
InventorsRanjan V. Sonalkar, Howard David Helms
Life of this patent
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AssigneeAT&T Corp.
InventorsRanjan V. Sonalkar, Howard David Helms
Estimating the term…
A digital channelizer employs a polyphase filter element in which a shift register is used to commutate time series data to a bank of polyphase filters at the inputs of an FFT module. The filter bank and FFT module are updated at a frequency that is independent of the rate that the data is fed into the buffer and filter/FFT cycle rates of less than the ratio of the input data rate to the number of input channels may be accommodated by the shift register commutation. The output of the FFT module is interpolation filtered by inserting interpolated points between adjacent data points in the channelized output stream to increase the output frequency by an integral multiple of the update rate of the polyphase filter/FFT update rate. By determining an integer, q, such that (Ro/Ri)(2N−q) is a non-zero integer l, where Ro is a desired output data rate, Ri is an input data rate and 2N is the number of output channels (M<N), updating the filter/FFT at a rate of Ri/(2N−q), and interpolation filtering by inserting l−1 interpolated data between each successive pair of channelized data, a desired output data rate can be matched with an input data rate.
A signal conditioning apparatus receiving primary data from a data source at a primary sample rate and outputting final data at a final sample rate, comprising:
A method of controlling a signal conditioning apparatus receiving primary data from a data source at a primary sample rate and outputting final data at a final sample rate, the method comprising steps of:
A method of separating the combined signals in a frequency division multiple access (FDMA) signal, comprising the steps of:
A method of controlling a polyphase filter having 2N input channels and a shift-register buffer to supply data received from a data source at a rate of Ri to 2N inputs of a Fourier transform computer, said polyphase filter supplying channelized data to a data sink at a rate of Ro, comprising the steps of:
A method of controlling a polyphase filter having 2N input channels and a shift-register buffer to supply data received from a data source at a rate of Ri, to 2N inputs of a Fourier transform computer, said polyphase filter supplying channelized data to a data sink at a rate of Ro, the method comprising steps of:
A signal channelizer, comprising:
A method of transforming a first signal having a first sample rate to a plurality of second signals each having a second sample rate, the method comprising steps of:
Dependencies are inferred from the claim text.