Flash based control for field programmable gate array
AssigneeActel Corporation
InventorJohn McCollum
Life of this patent
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Abstract
A circuit for controlling a switching transistor in a reprogrammable FPGA device comprises first and second floating gate flash memory transistors. A first floating gate flash memory transistor has a drain electrically coupled to a first voltage potential, a floating gate, a control gate coupled to a control gate node, and a source coupled to an output node. A second floating gate flash memory transistor has a drain electrically coupled to the output node, a floating gate, a control gate coupled to the control gate node, and a source coupled to a second voltage potential. The output node is coupled to the gate of a switching transistor.
Claims6
A circuit for controlling a switching transistor comprising:
- a control gate potential node;
- an output node;
- a p-channel floating gate flash memory transistor having a drain electrically coupled to a first voltage potential, a floating gate, a control gate coupled to said control gate potential node, and a source coupled to said output node;
- an n-channel floating gate flash memory transistor having a drain electrically coupled to said output node, a floating gate, a control gate coupled to said control gate potential node, and a source coupled to a second voltage potential;
- wherein said floating gate of said p-channel floating gate flash memory transistor is electrically coupled to said floating gate of said n-channel floating gate memory transistor;
- and
- wherein said output node is coupled to said switching transistor.
A circuit for controlling a switching transistor comprising:
- a control gate potential node;
- an output node;
- a p-channel floating gate flash memory transistor having a drain electrically coupled to a first voltage potential, a floating gate, a control gate coupled to said control gate potential node, and a source coupled to said output node;
- an n-channel floating gate flash memory transistor having a drain electrically coupled to said output node, a floating gate, a control gate coupled to said control gate potential node, and a source coupled to a second voltage potential;
- wherein said floating gate of said p-channel floating gate flash memory transistor and said floating gate of said n-channel floating gate memory transistor are formed from a single contiguous piece of polysilicon;
- and
- wherein said output node is coupled to said switching transistor.
A method for controlling a switching transistor comprising:
- providing said switching transistor having a gate:
- providing a first floating gate flash memory transistor having a drain electrically coupled to a first voltage potential, a floating gate, a control gate coupled to a control gate potential node, and a source coupled to an output node;
- providing a second floating gate flash memory transmitter having drain electrically coupled to said output node, a floating gate, a control gate coupled to said control gate potential node, and a source coupled to a second voltage potential;
- providing a single contiguous piece of polysilicon forming said floating gate of said first floating gate flash memory transistor and said floating gate of said second floating gate flash memory transistor;
- coupling said output node to said switching transistor;
- programming said floating gate to a first state if said switching transistor is to be turned on;
- and
- programming said floating gate to a second state if said switching transistor is to be turned off.
Dependencies are inferred from the claim text.