US 6,356,153 B1 · Rail-to-rail input/output operational amplifier and method

Abstract

A rail-to-rail differential amplifier includes first and second input terminals, and an output terminal and an input stage including differentially connected N-channel first and second input transistors, and differentially connected P-channel third and fourth input transistors. A P-channel first cascode transistor has a source coupled to a first supply voltage to the drain of the first input transistor. An N-channel cascode transistor has a source coupled by a second resistive element to a second supply voltage and to the drain of the third input transistor. A first gain boost amplifier has an output coupled to a gate of the first cascode transistor, a first input coupled to the source of the first cascode transistor and the drain of the first input transistor, and a second input coupled to a drain of the second input transistor and a bias control circuit. A second gain boost amplifier has an output coupled to a gate of the second cascode transistor, a first input coupled to the source of the second cascode transistor and to the drain of the third input transistor, and a second input coupled to a drain of the fourth input transistor and the bias control circuit. An output stage includes a pull-up transistor coupled between the first supply voltage and the output terminal, a pull-down transistor coupled between the second supply voltage and the output terminal, and a class AB bias circuit coupled between drain electrodes of the fist and second cascode transistors and between gate electrodes of the pull-up and pull-down transistors.

Claims10

Dependent claims

A method of operating a differential amplifier, comprising:

(a) applying an input signal between gates of differentially connected first and second input transistors of a first channel type, and also between gates of differentially connected third and fourth input transistors of the second channel type;
(b) applying a signal produced by the first input transistor to a junction between a source of a first cascode transistor of the second channel type and a first resistive element also coupled to a first supply voltage rail;
(c) applying a signal produced by the third input transistor to a junction between a source of a second cascode transistor of the first channel type and a second resistive element also coupled to a second supply voltage rail;
(d) applying a signal produced between the drain of the first input transistor and a drain of the second input transistor between a first and second inputs of a first gain boost amplifier having an output coupled to the gate of the first cascode transistor, and applying a signal produced between the drain of the third input transistor and a drain of the fourth input transistor between a first and second inputs of a second gain boost amplifier having an output coupled to the gate of the second cascode transistor;
and
(e) providing an output stage including a pull-up transistor of the second channel type coupled between the first supply voltage rail and the output terminal, a pull-down transistor of the first channel type coupled between the second supply voltage rail and the output terminal, and a class AB bias circuit coupled between drain electrodes of the first and second cascode transistors and the gate electrodes of the pull-up and pull-down transistors.

3 more elements

A differential amplifier with a rail-to-rail common mode input voltage range, comprising:

(a) first and second supply voltage rails, first and second input terminals, and an output terminal;
(b) a rail-to-rail input stage including differentially connected first and second input transistors of a first channel type, and differentially connected third and fourth input transistors of the second channel type;
(c) a first cascode transistor of the second channel type, a source of the first cascode transistor being coupled by a first resistive element to the first supply voltage rail, the source of the first cascode transistor being coupled to the drain of the first input transistor;
(d) a second cascode transistor of the first channel type, a source of the second cascode transistor being coupled by a second resistive element to the second supply voltage rail, the source of the second cascode transistor being coupled to the drain of the third input transistor;
(e) a first gain boost amplifier having an output coupled to the gate of the first cascode transistor, a first input coupled to the source of the first cascode transistor and to the drain of the first input transistor, and a second input coupled to a drain of the second input transistor and a bias control circuit;
(f) a second gain boost amplifier having an output coupled to the gate of the second cascode transistor, a first input coupled to the source of the second cascode transistor and to the drain of the third input transistor, and a second input coupled to a drain of the fourth input transistor and the bias control circuit;
and
(g) an output stage including a pull-up transistor of the second channel type coupled between the first supply voltage rail and the output terminal, a pull-down transistor of the first channel type coupled between the second supply voltage rail and the output terminal, and a class AB bias circuit coupled between drain electrodes of the first and second cascode transistors and the gate electrodes of the pull-up and pull-down transistors.

5 more elements

A differential amplifier with a rail-to-rail common mode input voltage range, comprising:

(a) first and second supply voltage rails, first and second input terminals, and an output terminal;
(b) a rail-to-rail input stage including differentially connected first and second input transistors of a first channel type, and differentially connected third and fourth input transistors of the second channel type;
(c) a first cascode transistor of the second channel type, a source of the first cascode transistor being coupled to the first supply voltage rail, the source of the first cascode transistor being coupled to the drain of the first input transistor;
(d) a second cascode transistor of the first channel type, a source of the second cascode transistor being coupled to the second supply voltage rail, the source of the second cascode transistor being coupled to the drain of the third input transistor;
(e) a control circuit producing control signals on gate electrodes of the first and second cascode transistors, the control circuit including a first gain boost amplifier having an output coupled to the gate of the first cascode transistor and a first input coupled to the source of the first cascode transistor and to the drain of the first input transistor, the control circuit also including a second gain boost amplifier having an output coupled to the gate of the second cascode transistor and a first input coupled to the source of the second cascode transistor and to the drain of the third input transistor, the control circuit including a third cascode transistor of the first channel type having a drain coupled to a second input of the first gain boost amplifier, a drain of the second input transistor, and to the first supply voltage rail, a source of the third cascode transistor being coupled to a second input of the second gain boost amplifier, a drain of the fourth input transistor, and the second supply voltage rail, the control circuit farther including a fourth cascode transistor of the first channel type having a drain coupled to the first supply voltage rail, a source coupled to a first input of a differential amplifier and to one terminal of a constant current source coupled to the second supply voltage rail and a gate coupled to the gate of the third cascode transistor and the output of the differential amplifier, the differential amplifier having a second input coupled to the source of the third cascode transistor;
and
(f) an output stage including a pull-up transistor of the second channel type coupled between the first supply voltage rail and the output terminal, a pull-down transistor of the first channel type coupled between the second supply voltage rail and the output terminal, and a class AB bias circuit coupled between drain electrodes of the first and second cascode transistors and the gate electrodes of the pull-up and pull-down transistors.

4 more elements

Dependencies are inferred from the claim text.

Rail-to-rail input/output operational amplifier and method

Life of this patent

Rail-to-rail input/output operational amplifier and method

Life of this patent

Abstract

Claims10