Turbo code symbol interleaver

An interleaver comprising:

• means for receiving encoded bits from a first redundancy encoder, said encoded bits associated with a particular symbol interval;
• means for receiving remaining bits associated with said particular symbol interval;
• means for storing, as a group, said encoded bits from said first redundancy encoder;
• and
• means for outputting stored groups of bits in an order different from the order in which they were stored, at least a portion of each of said groups of bits being provided to said second redundancy encoder;
• and
• wherein said means for storing comprises means for storing, as a group, said remaining bits along with said encoded bits from said first redundancy encoder.

A method for generating data symbols representing a stream of input bits, and from which said input bits can be recovered, each data symbol being generated for a respective symbol interval and being represented by at least one signal space coordinate, the method comprising the steps, performed for each symbol interval of:

• encoding a predetermined number of said input bits, associated with a particular symbol interval, with a first redundancy code to generate first redundancy encoded output bits;
• interleaving a group of bits on a bit-group-by-bit-group level, said group including said first redundancy encoded output bits;
• encoding a predetermined number of said interleaved first redundancy encoded output bits with a second redundancy code to generate second redundancy encoded output bits;
• and
• generating one of said data symbols as a function of a plurality of bits, said plurality of bits including any remaining ones of said interleaved first redundancy encoded output bits, said second redundancy encoded output bits, and any remaining input bits associated with said particular symbol interval.

An apparatus for generating data symbols representing a stream of input bits, and from which said input bits can be recovered, each data symbol being generated for a respective symbol interval and being represented by at least one signal space coordinate, the apparatus comprising:

• a first redundancy encoder adapted to encode a predetermined number of input bits, associated with a particular symbol interval, using a first redundancy code to generate first redundancy encoder output bits;
• an interleaver adapted to interleave a group of bits on a bit-group-by-bit-group level, said group including said first redundancy encoded output bits;
• and
• a second redundancy encoder adapted to encode a predetermined number of said interleaved first redundancy encoder output bits using a second redundancy code to generate second redundancy encoder output bits;
• and
• a mapper adapted to select a data symbol from a predetermined signal constellation as a function of a plurality of bits, said plurality of bits including any remaining ones of said interleaved first redundancy encoder output bits, said second redundancy encoder output bits, and any remaining input bits associated with said particular symbol interval.

A method comprising the steps of:

• encoding at least ones of a sequence of input bit groups using a first redundancy code to generate expanded groups of first redundancy encoded output bits;
• interleaving said expanded groups of first redundancy encoded output bits on a bit-group-by-bit-group basis;
• encoding a predetermined number of said interleaved first redundancy encoded output bits using a second redundancy code to generate an expanded group of second redundancy encoded output bits;
• and
• selecting a data symbol from a predetermined signal constellation as a function of a plurality of bits, said plurality of bits including any remaining ones of said interleaved first redundancy encoded output bits and said second redundancy encoded output bits.

Apparatus comprising:

• a first redundancy encoder adapted to encode at least ones of a sequence of input bit groups using a first redundancy code to generate expanded groups of first redundancy encoder output bits;
• an interleaver adapted to interleave said expanded groups of first redundancy encoder output bits on a bit-group-by-bit-group basis;
• a second redundancy encoder adapted to encode a predetermined number of said interleaved first redundancy encoder output bits using a second redundancy code to generate an expanded group of second redundancy encoder output bits;
• and
• a mapper adapted to select a data symbol from a predetermined signal constellation as a function of a plurality of bits, said plurality of bits including any remaining ones of said interleaved first redundancy encoder output bits and said second redundancy encoder output bits.