Multi-section cache with different attributes for each section
AssigneeIntel Corporation
InventorsZhong-ning Cai, Tosaku Nakanishi
Life of this patent
Estimating the term…
Abstract
A system includes multiple program execution entities (e.g., tasks, processes, threads, and the like) and a cache memory having multiple sections. An identifier is assigned to each execution entity. An instruction of one of the execution entities is retrieved and an associated identifier is decoded. Information associated with the instruction is stored in one of the cache sections based on the identifier.
Claims20
A system comprising:
- a processor;
- a plurality of execution entities executable on the processor;
- and
- a cache memory having multiple cache sections, each cache section adapted to store information associated with requests from a corresponding one of the multiple execution entities,
- wherein at least two of the cache sections have different attributes, each attribute selected from the group consisting of a cache line replacement policy and cache update policy.
A method of setting up a cache memory having multiple cache sections, the cache memory located in a system having multiple execution entities, the method comprising:
- assigning an identifier to each execution entity based on which of the multiple cache sections is to be used for the execution entity;
- and
- configuring each of the cache sections to have an attribute based on the cache usage characteristics of the one or more execution entities assigned to the cache section,
- wherein at least two of the cache sections have different attributes, each attribute selected from the group consisting of a cache line replacement policy and cache update policy.
An article including a storage medium containing instructions for managing memory in a system, the system having a processor, a memory with multiple memory sections, and multiple execution entities executable on the processor, the instructions when executed causing the system to:
- assign each memory section to correspond to one or more of the execution entities;
- and
- configure attributes of each of the memory sections based on the memory usage characteristics of the one or more execution entities assigned to the memory section, each attribute selected from the group consisting of a cache line replacement policy and a cache update policy.
A processor located in a system having multiple execution entities, comprising:
- a cache memory having multiple cache sections each assigned to an execution entity;
- and
- a sequencer having multiple segments each assigned to an execution entity,
- the sequencer adapted to receive instructions from multiple execution entities, each segment of the sequencer to execute the received instructions concurrently and accessing the cache sections concurrently during execution.
A system comprising:
- program execution entities associated with identifiers;
- a multi-unit cache memory having multiple cache sections adapted to store information associated with requests from the execution entities, each cache section storing the information based on an identifier, wherein the requests contain instructions;
- and
- a processor having a plurality of program counters and corresponding microsequencers, each microsequencer adapted to fetch instructions associated with a corresponding execution entity based on an address contained in the program counter.
Dependencies are inferred from the claim text.