Dedicated function fabric for use in field programmable gate arrays

Abstract

A programmable logic device, such as a field programmable gate array (FPGA) which includes an array of configurable logic elements (CLEs) and a corresponding array of dedicated function blocks. The CLEs can be operated as conventional configurable logic elements, completely disconnected from the array of function blocks. However, selected CLEs can also be coupled to selected function blocks, thereby creating a relatively high density circuit to implement the dedicated function. The function blocks can be selectively coupled to one another, such that the function blocks are connected to form a relatively large circuit. The desired input signals are routed into the function blocks from associated CLEs. Similarly, the resulting output signals are routed from the function blocks to associated CLEs. In this manner, the FPGA is capable of implementing a relatively large circuit having the dedicated function in an efficient manner.

Dependencies are inferred from the claim text.