Method and architectural model for handling a pool of hardware resources

Abstract

An architectural model for level 1 ISO-OSI protocol comprises two sublayers, the lowest of them (PHLR) being designed to the control functions of a common hardware platform and the highest (PHLU) being designed to the functions of the use of the hardware resources. The lowest sublayer (PHLR) does not know which is the use of the hardware resources while the highest sublayer (PHLU) does not know the implementing features of hardware resources. The lowest sublayer (PHLR) communicates with the highest sublayer (PHLU) to provide information about the status of the hardware in use. Said information is utilized to make possible the replacement of a used circuit in the event of a fault.

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