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US 6,337,828 B2Granted
Semiconductor memory device having function of supplying stable power supply voltage
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The inventive semiconductor memory device comprises a synchronous circuit formed by a PLL circuit requiring precise operations, an internal circuit group and a VDC circuit. The VDC circuit, a capacitor, a PMOS transistor for a dummy current and an NMOS transistor serving as a high impedance element are arranged for the synchronous circuit. The VDC circuit is arranged for the internal circuit group. The VDC circuit eliminates power supply noise. The PMOS transistor stabilizes the operation of a differential amplifier of the VDC circuit. The capacitor keeps potential difference between a power supply side and a GND side constant. The NMOS transistor stabilizes the voltage on the GND side.
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For memory cells of the field-effect type: power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage…
Power supply arrangements , e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels: detection…
Power supply arrangements , e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels: voltage…
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Term ended 28 Feb 2020 (estimated)
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