US 6,337,519 B1 · Semiconductor device having a multilayered interconnection structure

Abstract

A semiconductor device has a multilayer interconnection structure including a lower organic interlayer insulation film, an etching stopper film on the lower interlayer insulation film and an upper organic interlayer insulation film covering the etching stopper film, wherein the upper organic interlayer insulation film is covered by first and second etching stopper films of respective, different compositions.

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Facts

Application

09/662,318Filed 14 Sep 2000

Granted

8 Jan 2002

Term ends

Not estimatedThe source records don’t support an estimate.

Classification11 codes

H10W 20/087
For dual-damascene structures: involving multiple stacked pre-patterned masks
H10P 14/6336
Using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition: in the presence of a plasma [PECVD]
H10P 14/6342
Deposition processes: liquid deposition, e.g. spin-coating, sol-gel techniques or spray coating
H10P 14/662
Characterised by the type of materials: laminate layers, e.g. stacks of alternating high-k metal oxides

Semiconductor device having a multilayered interconnection structure

Life of this patent

Abstract

Claims0

Semiconductor device having a multilayered interconnection structure

Life of this patent

Abstract

Claims0