Segmented write line architecture for writing magnetic random access memories

Abstract

An architecture for selectively writing one or more magnetic memory cells in a magnetic random access memory (MRAM) device comprises at least one write line including a global write line conductor and a plurality of segmented write line conductors connected thereto, the global write line conductor being substantially isolated from the memory cells. The architecture further includes a plurality of segmented groups, each segmented group including a plurality of memory cells operatively coupled to a corresponding segmented write line conductor, and a plurality of segmented group select switches, each group select switch being operatively connected between a corresponding segmented write line conductor and a write line current return conductor, the group select switch including a group select input for receiving a group select signal, the group select switch substantially completing an electrical circuit between the corresponding segmented write line conductor and the write line current return conductor in response to the group select signal. A plurality of bit lines are operatively coupled to the magnetic memory cells for selectively writing the state of the memory cells.

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