Back to results
US 6,335,648 B1Granted
Circuit using internal pull-up/pull-down resistor during reset
Life of this patent
Estimating the term…
Abstract
When a semiconductor integrated circuit device is reset, an input and output node is to be pulled down or up for stability of the integrated circuit, wherein a series combination of a pull-down resistor/pull-up resistor and a switching transistor is integrated on the semiconductor chip in such a manner as to permit the switching transistor to flow electric current through the pull-down/pull-up resistor only when the semiconductor integrated circuit device is reset, thereby enhancing the stability without sacrifice of the power consumption.
Claims0
Claims aren’t available for this document.