US 6,335,562 B1 · Method and design for the suppression of single event upset failures in digital circuits made from GaAs and related compounds

Abstract

Single event upset failure are suppressed in GaAs-based electronics by implanting the GaAs substrate with an appropriate dose of O and at least one of either Al, Cr, or In.

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Dependent claims

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Facts

Application

09/457,521Filed 9 Dec 1999

Granted

1 Jan 2002

Term ends

Not estimatedThe source records don’t support an estimate.

Classification7 codes

H10P 30/206
Characterised by the semiconductor materials: into Group III-V semiconductors
H10P 30/208
Into semiconductor materials, e.g. for doping: of electrically inactive species
H10P 34/10
Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices: with corpuscular radiation
H10P 95/408
Treatments of semiconductor bodies to modify their internal properties, e.g. to produce internal imperfections: of Group III-V semiconductors,…

Abstract

Single event upset failure are suppressed in GaAs-based electronics by implanting the GaAs substrate with an appropriate dose of O and at least one of either Al, Cr, or In.

Method and design for the suppression of single event upset failures in digital circuits made from GaAs and related compounds

Life of this patent

Abstract

Claims0

Method and design for the suppression of single event upset failures in digital circuits made from GaAs and related compounds

Life of this patent

Abstract

Claims0