System and method for improved bitwrite capability in a field programmable memory array

A system for performing a bitwrite operation within each of a plurality of subarrays within a field programmable memory array, the system comprising:

• a memory subarray including a plurality of memory words each being uniquely addressable for reading or writing data thereto, and each word comprising a plurality of first memory cells;
• a plurality of write bitlines means within the memory subarray, each write bitline means corresponding to an associated first memory cell of a memory word within the memory subarray for the purposes of carrying data to or from said first memory cell of a memory word within the subarray;
• a plurality of write wordlines within the memory subarray, a write wordline connected to all said first memory cells within said memory word for the purposes of selectively propagating data between each write bitline means and the memory word within the array;
• a bitwrite line means associated with a respective write bitline means, for independently enabling said write bitline means to perform a write operation on a bit by bit basis within said memory word;
• a programmable bitwrite control subarray having a plurality of second memory cells arranged in a first dimension equal in number to the plurality of said memory cells forming said memory word and a second dimension equal to 2N where N is a number of inputs to said bitwrite control subarray, at least one of said plurality of second memory cells selectively connectable to each of said bitwrite line means to provide simultaneous independent write access to one or more first memory cells which form a subset of first memory cells within said memory word within said memory subarray, said bitwrite control subarray receiving an N-bit address for functionally selecting one or more of said second memory cells within said bitwrite control subarray to be connected to said bitwrite line means;
• and
• a data bus forming inputs to said bitwrite control subarray to program said one or more of said second memory cells within said bitwrite control subarray according to one or more user defined functional bitwrite patterns, a bitwrite pattern selectably connectable to respective bitwrite line means in response to a received N-bit address, wherein up to 2N bitwrite patterns may be programmed.