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US 6,334,163 B1Granted
Elastic interface apparatus and method therefor
AssigneeInternational Business Machines Corporation
InventorsDaniel Mark Dreps, Frank David Ferraiolo, Kevin Charles Gower
Life of this patent
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Abstract
An elastic interface apparatus and method are implemented. The elastic interface includes a plurality of storage units for storing for storing a stream of data values, wherein each storage unit sequentially stores members of respective sets of data values. Each data value is stored for a predetermined number of periods of a local clock. Selection circuitry may be coupled to the storage units to select the respective data value from the data stream for storage in the corresponding storage unit. Data is sequentially output from each storage unit in synchrony with the local clock on a target cycle of the local clock.
Claims29
An interface apparatus comprising:
- a first storage device operable for storing a first set of data values;
- a second storage device operable for storing a second set of data values;
- and
- circuitry coupled to said first and second storage devices operable for sequentially outputting a first data value from said first storage device and a second data value from said second storage device in response to at least one control signal, wherein said first and second storage devices hold data values for a predetermined number of half-periods of a first clock, wherein said at least one control signal is operable for outputting said first data value on a preselected cycle of said first clock, wherein said first storage device latches data on a first predetermined edge of a second clock, and said second storage device latches on a second predetermined edge of said second clock.
1 more element
An interface apparatus comprising:
- a first storage device operable for storing a first set of data values;
- a second storage device operable for storing a second set of data values;
- circuitry coupled to said first and second storage devices operable for sequentially outputting a first data value from said first storage device and a second data value from said second storage device in response to at least one control signal, wherein said first and second storage devices hold data values for a predetermined number of half-periods of a first clock, wherein said at least one control signal is operable for outputting said first data value on a preselected cycle of said first clock;
- and
- first and second selection circuitry each having an output respectively coupled to corresponding inputs of said first and second storage devices, said first and second selection circuitry each having a first input operable for receiving a data stream, and a second input coupled to a respective output of said first and second storage devices, wherein said first and second selection circuitry is operable for selecting for outputting a signal on one of said first and second inputs in response to first and second gate signals;
- wherein said first and second gate signals each have a period twice a period of said first clock, and wherein said second gate signal is a complement of said first gate signal.
3 more elements
An interface apparatus comprising:
- a first storage device operable for storing a first set of data values;
- a second storage device operable for storing a second set of data values;
- and
- circuitry coupled to said first and second storage devices operable for sequentially outputting a first data value from said first storage device and a second data value from said second storage device in response to at least one control signal, wherein said first and second storage devices hold data values for a predetermined number of half-periods of a first clock, wherein said at least one control signal is operable for outputting said first data value on a preselected cycle of said first clock, wherein said circuitry operable for selectively sequentially outputting first and second data values comprises a multiplexer (MUX) having a first input operable for receiving said first data value and a second input operable for receiving said second data value, wherein said MUX selects for outputting one of said first and second data values in response to a select control signal having a period that is a predetermined multiple of a period of said first clock, wherein said period of said select control signal is twice the period of said first clock.
1 more element
An interface apparatus comprising:
- a first storage device operable for storing a first set of data values;
- a second storage device operable for storing a second set of data values;
- and
- circuitry coupled to said first and second storage devices operable for sequentially outputting a first data value from said first storage device and a second data value from said second storage device in response to at least one control signal, wherein said first and second storage devices hold data values for a predetermined number of half-periods of a first clock, wherein said at least one control signal is operable for outputting said first data value on a preselected cycle of said first clock, wherein said circuitry operable for selectively sequentially outputting first and second data values comprises:
- a first latch having an input operable for receiving said first data value;
- a second latch having an input operable for receiving said second data value;
- and
- a multiplexer (MUX) having a first input coupled to an output of said first latch and a second input coupled to an output of said second latch, said MUX being operable for selecting for outputting one of said first and second data values in response to a select control signal having a period that is a predetermined multiple of a period of said first clock, and wherein said first and second latch holds data on first and second predetermined levels of said first clock.
5 more elements
An interface apparatus comprising:
- a plurality, M, of first multiplexers (MUX), each having a first input operable for receiving a data stream, and an output;
- a plurality, M, of first latches, each having an input coupled to an output of a corresponding first MUX, each said first latch having a first output, and a second output coupled to a second input of said corresponding first MUX;
- a plurality, M, of second MUXs, each having a first input operable for receiving said data stream, and an output;
- a plurality, M, of second latches, each second latch comprising a latch pair wherein an input of a first one of said pair is coupled to an output of a corresponding second MUX, and has an output, and a second one of said pair has an input coupled to said output of said first one of said pair, and an output coupled to a second input of said corresponding second MUX;
- a plurality of third latches having an input coupled to said first output of a corresponding one of said first latches, and an output coupled to a corresponding input of a third MUX;
- a plurality of fourth latches having an input coupled to said output of said first one of said latch pair, and an output coupled to a corresponding input of said third MUX, said third MUX operable for outputting a sequence of data values in response to a select control, said select control comprising a plurality, k, of signals, wherein a first signal of said plurality of k signals has a half-period equal to a period of a first clock, wherein said each of said first and second latches is operable in response to a second clock signal having a half-period equal to the period of said first clock, and wherein each of said of third latches is operable in response to said first clock.
3 more elements
A method of interfacing integrated circuit devices comprising the steps of:
- storing a first set of data values in a first storage element, wherein each data value of said first set is stored for a predetermined number of half-periods of a first clock;
- storing a second set of data values in a second set of storage elements wherein each data value of said second set is stored for a predetermined number of half-periods of said first clock;
- sequentially outputting a first data value from said first storage device and a second data value from said second storage device in response to at least one control signal, wherein said at least one control signal is operable for outputting said first data value on a preselected cycle of said first clock, wherein said step of sequentially outputting a first data value comprises the step of:
- providing a control signal to a first selection circuit coupled to said first and second storage devices, wherein said control signal has a period that is a predetermined multiple of a period of said first clock;
- receiving a data stream at an input of a second and third selection circuitry;
- outputting each of said first set of data values to said first storage element from said second selection circuitry in response to a first selection signal;
- and
- outputting each of said second set of data values to said second storage element from said third selection circuitry in response to a second selection signal;
- wherein said first and second selection signals are complementary signals.
6 more elements
A method of interfacing integrated circuit devices comprising the steps of:
- storing a first set of data values in a first storage element, wherein each data value of said first set is stored for a predetermined number of half-periods of a first clock;
- storing a second set of data values in a second set of storage elements wherein each data value of said second set is stored for a predetermined number of half-periods of said first clock;
- sequentially outputting a first data value from said first storage device and a second data value from said second storage device in response to at least one control signal, wherein said at least one control signal is operable for outputting said first data value on a preselected cycle of said first clock, wherein said step of sequentially outputting a first data value comprises the step of:
- providing a control signal to a first selection circuit coupled to said first and second storage devices, wherein said control signal has a period that is a predetermined multiple of a period of said first clock;
- receiving a data stream at an input of a second and third selection circuitry;
- outputting each of said first set of data values to said first storage element from said second selection circuitry in response to a first selection signal;
- and
- outputting each of said second set of data values to said second storage element from said third selection circuitry in response to a second selection signal;
- wherein said first and second selection signals have a period that is twice a period of a period of said first clock.
6 more elements
A method of interfacing integrated circuit devices comprising the steps of:
- storing a first set of data values in a first storage element, wherein each data value of said first set is stored for a predetermined number of half-periods of a first clock;
- storing a second set of data values in a second set of storage elements wherein each data value of said second set is stored for a predetermined number of half-periods of said first clock;
- sequentially outputting a first data value from said first storage device and a second data value from said second storage device in response to at least one control signal, wherein said at least one control signal is operable for outputting said first data value on a preselected cycle of said first clock, wherein said step of sequentially outputting a first data value comprises the step of:
- providing a control signal to a first selection circuit coupled to said first and second storage devices, wherein said control signal has a period that is a predetermined multiple of a period of said first clock;
- receiving a data stream at an input of a second and third selection circuitry;
- outputting each of said first set of data values to said first storage element from said second selection circuitry in response to a first selection signal;
- outputting each of said second set of data values to said second storage element from said third selection circuitry in response to a second selection signal;
- and
- initializing said first and second selection signals in response to a latency of a signal path operable for communicating said data stream.
6 more elements
A data processing system comprising:
- a first data processing device;
- and
- a second data processing device coupled to said first data processing device via an elastic interface, said elastic interface comprising:
- a first storage device operable for storing a first set of data values;
- a second storage device operable for storing a second set of data values;
- and
- circuitry coupled to said first and second storage devices operable for sequentially outputting a first data value from said first storage device and a second data value from said second storage device in response to at least one control signal, wherein said first and second storage devices hold data values for a predetermined number of cycles of a first clock.
4 more elements
An interface apparatus comprising:
- a first storage device operable for storing a first set of data values;
- a second storage device operable for storing a second set of data values;
- circuitry coupled to said first and second storage devices operable for sequentially outputting a first data value from said first storage device, and a second data value from said second storage device in response to at least one control signal, wherein said first and second storage devices hold data values for a predetermined number of half-periods of a first clock, and wherein said at least one control signal is operable for outputting said first data value on a preselected cycle of said first clock, said preselected cycle of said first clock associated with a latency of a signal path operable for communicating said first set of data values and said second set of data values.
A method of interfacing integrated circuit devices comprising the steps of:
- storing a first set of values in a first storage element, wherein each value of said first set is stored for a predetermined number of half-periods of a first clock;
- storing a second set of data values in a second set of storage elements wherein each data value of said second set is stored for a predetermined number of half-periods of said first clock;
- and
- sequentially outputting a first data value from said first storage device and a second data value from said second storage device in response to at least one control signal wherein said at least one control signal is operable for outputting said first data value on a preselected cycle of said first clock, said preselected cycle of said first clock associated with a latency of a signal path operable for communicating said first set of data values and said second set of data values.
1 more element
Dependencies are inferred from the claim text.