Synchronization of a low power oscillator with a reference oscillator in a wireless communication device utilizing slotted paging

A circuit for controlling a mobile station operating in a slotted paging environment, the circuit comprising:

• a low power clock for generating a low frequency clock signal;
• a clock signal generator for generating a high frequency clock signal;
• a synchronization logic circuit for synchronizing said low frequency clock signal to said high frequency clock signal, wherein said synchronization logic circuit comprises at least one digital latch for aligning a edge of said low frequency clock signal to a rising edge of said high frequency clock signal;
• a frequency error estimator for measuring an estimated low frequency clock error;
• a sleep duration value generator for generating a corrected sleep duration value in response to said estimated low frequency clock error;
• and
• a sleep controller for removing power from said clock signal generator for said corrected sleep duration value.

A circuit for controlling a mobile station operating in a slotted paging environment, the circuit comprising:

• a low power clock for generating a low frequency clock signal;
• a clock signal generator for generating a high frequency clock signal;
• a synchronization logic circuit for synchronizing said low frequency clock signal to said high frequency clock signal;
• a frequency error estimator for measuring an estimated low frequency clock error, wherein said frequency error estimator comprises:
• a counter for counting a number of high frequency clock signal periods per low frequency clock signal period;
• and
• an accumulator for accumulating a difference between an expected number of high frequency clock signal periods per low frequency clock signal period and an actual number of high frequency clock signal periods per low frequency clock signal period;
• a sleep duration value generator for generating a corrected sleep duration value in response to said estimated low frequency clock error;
• and
• a sleep controller for removing power from said clock signal generator for said corrected sleep duration value.

A method for controlling a mobile station operating in a slotted paging environment, comprising the steps of:

• generating a low frequency clock signal;
• generating a high frequency clock signal;
• synchronizing said low frequency clock signal to said high frequency clock signal;
• measuring an estimated low frequency clock error;
• generating a corrected sleep duration value in response to said estimated low frequency clock error;
• entering a sleep mode for said corrected sleep duration value;
• programming a programmable counter with said corrected sleep duration value;
• and
• metering said corrected sleep duration value.

A method for controlling a mobile station operating in a slotted paging environment, comprising the steps of:

• generating a low frequency clock signal;
• generating a high frequency clock signal;
• synchronizing said low frequency clock signal to said high frequency clock signal, wherein said step of synchronizing said low frequency clock signal to said high frequency clock signal comprises aligning an edge of said low frequency clock signal to a rising edge of said high frequency clock signal;
• measuring an estimated low frequency clock error;
• generating a corrected sleep duration value in response to said estimated low frequency clock error;
• and
• entering a sleep mode for said corrected sleep duration value.

A method for controlling a mobile station operating in a slotted paging environment, comprising the steps of:

• generating a low frequency clock signal;
• generating a high frequency clock signal;
• synchronizing said low frequency clock signal to said high frequency clock signal;
• measuring an estimated low frequency clock error, wherein said step of measuring an estimated low frequency clock error comprises the steps of:
• counting a number of high frequency clock signal periods per low frequency clock signal period;
• and
• accumulating a difference between an expected number of high frequency clock signal periods per low frequency clock signal period and an actual number of high frequency clock signal periods per low frequency clock signal period;
• generating a corrected sleep duration value in response to said estimated low frequency clock error;
• and
• entering a sleep mode for said corrected sleep duration value.

Apparatus for controlling a mobile station operating in a slotted paging environment, comprising:

• means for generating a low frequency clock signal;
• means for generating a high frequency clock signal;
• means for synchronizing said low frequency clock signal to said high frequency clock signal;
• means for measuring an estimated low frequency clock error;
• means for generating a corrected sleep duration value in response to said estimated low frequency clock error;
• means for entering a sleep mode for said corrected sleep duration value;
• means for programming a programmable counter with said corrected sleep duration value;
• and
• means for metering said corrected sleep duration value.

Apparatus for controlling a mobile station operating in a slotted paging environment, comprising:

• means for generating a low frequency clock signal;
• means for generating a high frequency clock signal;
• means for synchronizing said low frequency clock signal to said high frequency clock signal, wherein said means for synchronizing said low frequency clock signal to said high frequency clock signal comprises means for aligning an edge of said low frequency clock signal to a rising edge of said high frequency clock signal;
• means for measuring an estimated low frequency clock error;
• means for generating a corrected sleep duration value in response to said estimated low frequency clock error;
• and
• means for entering a sleep mode for said corrected sleep duration value.

Apparatus for controlling a mobile station operating in a slotted paging environment, comprising:

• means for generating a low frequency clock signal;
• means for generating a high frequency clock signal;
• means for synchronizing said low frequency clock signal to said high frequency clock signal;
• means for measuring an estimated low frequency clock error, wherein said means for measuring an estimated low frequency clock error comprises:
• means for counting a number of high frequency clock signal periods per low frequency clock signal period;
• and
• means for accumulating a difference between an expected number of high frequency clock signal periods per low frequency clock signal period and an actual number of high frequency clock signal periods per low frequency clock signal period;
• means for generating a corrected sleep duration value in response to said estimated low frequency clock error;
• and
• means for entering a sleep mode for said corrected sleep duration value.