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US 6,333,891 B1Granted
Circuit and method for controlling a wordline and/or stabilizing a memory cell
AssigneeCypress Semiconductor Corporation
InventorsGreg J. Landry, Peter Adamek
Life of this patent
Estimating the term…
Abstract
A circuit and method for controlling a wordline and/or stabilizing a memory cell comprising a first circuit and a second circuit. The first circuit may be configured to generate a control signal in response to (i) a select signal and (i) an equalization signal. The second may be configured to generate an output signal in response to (i) the control signal and (ii) a global wordline signal. The output signal may be presented to one or more memory cells of a memory array.
Claims14
An apparatus comprising:
- a circuit configured to generate an output signal in response to (i) an equalization signal, (ii) a global wordline signal and (iii) a block select signal, wherein said output signal is presented to one or more emory cells of a memory array.
An apparatus comprising:
- a circuit configured to generate a wordline signal in response to (i) an equalization signal (ii) a global wordline signal, wherein said wordline signal is presented to one or more memory cells of a memory array.
An apparatus comprising:
- a circuit configured to generate an output signal in response to (i) an equalization signal (ii) a global wordline signal, wherein said output signal is presented to a plurality of memory cells of a memory array.
An apparatus comprising:
- a circuit configured to generate an output signal in response to (i) an equalization signal (ii) a global wordline signal, wherein said output signal is presented to one or more memory cells of a memory array and said apparatus comprises a wordline control circuit.
Dependencies are inferred from the claim text.