Semiconductor memory device capable of detecting high-voltage test command signal

The semiconductor memory device according to claim 1, wherein said test circuit includes:

• a voltage detection circuit generating said first and second voltage fractions and outputting a first logic signal indicating detection of said test command voltage according to said first voltage fraction being at least said second voltage fraction and a second logic signal indicating detection of said test command voltage according to said first voltage fraction being lower than said second voltage fraction;
• and
• a test mode transition circuit causing transition of said test target circuit to the test mode according to said first logic signal.
• 3.The semiconductor memory device according to claim 2, wherein said voltage detection circuit includes:
• a first voltage division circuit formed of said n MOS transistors to output said first voltage fraction to a first node;
• a second voltage division circuit formed of said m MOS transistors to output said second voltage fraction to a second node;
• a comparison circuit comparing said first voltage fraction with said second voltage fraction and differentially amplifying a result of the comparison to output the amplified result;
• and
• a logic circuit outputting said first logic signal when the output of said comparison circuit deviates to one side from a predetermined reference value and outputting said second logic signal when said output deviates to the other side from the predetermined reference value.