Semiconductor memory device with an internal voltage generating circuit

A semiconductor memory device formed on a single semiconductor chip, comprising:

• a first memory array including a plurality of dynamic type memory cells;
• a second memory array including a plurality of static type memory cells;
• data transfer means for transferring data between said first memory array and second memory array;
• control means responsive to an external repeatedly applied clock signal for generating internal signals for use in said semiconductor memory device;
• and
• voltage generating means responsive to said repeatedly applied clock signal for generating an internal supply voltage.

A semiconductor memory device formed on a single semiconductor chip, comprising:

• a first memory array including a plurality of first type memory cells;
• a second memory array including a plurality of second type memory cells;
• data transfer means for transferring data between said first memory array and said second memory array;
• control means in synchronization with an external clock signal for strobing an external control signal thereinto for generating an internal control signal corresponding to the strobed external control signal, said external clock signal having a width of a predetermined time duration and repeatedly applied;
• and,
• voltage generation means responsive to said external clock signal for generating an internal supply voltage for use in said semiconductor memory device.

A semiconductor memory device comprising:

• a memory cell array including a plurality of memory cells;
• means for receiving data from memory cells selected in said memory cell array and for sequentially outputting the received data externally in synchronization with an external clock signal of repeated pulses;
• and
• voltage generation means responsive to said external clock signal for generating an internal supply voltage for use in said semiconductor memory device.

A semiconductor memory device comprising:

• a memory cell array including a plurality of memory cells;
• means for inputting data sequentially in synchronization with an external clock signal for writing into memory cells selected in said memory cell array;
• and,
• voltage generation means responsive to said external clock signal for generating an internal supply voltage for use in said semiconductor memory device.

A semiconductor memory device comprising:

• memory storage means;
• control means for receiving external signals including an external clock signal and external control signals;
• and
• voltage generating means for generating an internal voltage for use in said semiconductor memory device in response to said external clock signal;
• wherein
• said external control signals define access and standby states of the memory storage means;
• and
• said voltage generating means is responsive to receipt of the external clock signal irrespective of whether the semiconductor memory device is in the access state or the standby state to generate said internal voltage for the memory device from said external clock signal.