Semiconductor memory device with readily changeable memory capacity
AssigneesMitsubishi Denki Kabushiki Kaisha, Mitsubishi Electric Engineering Company Limited
InventorsHiroaki Tanizaki, Shigeki Tomishima
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AssigneesMitsubishi Denki Kabushiki Kaisha, Mitsubishi Electric Engineering Company Limited
InventorsHiroaki Tanizaki, Shigeki Tomishima
Estimating the term…
First and second memory cell arrays have their respective sides with first and second center circuit bands adjacent thereto, respectively, and provided therein with their respective address latch circuits, row predecode circuits and row decoders. The first and second memory cell arrays share a sense amplifier band having a side with a center cross circuit band adjacent thereto and provided therein with a column decode circuit and a sense amplifier control circuit controlling activating a sense amplifier. As such the number of signal lines between the second center circuit band and the center cross circuit band can be reduced to alleviate thick density of signal lines. Thus there can be provided a DRAM core with readily changeable memory capacity.
A semiconductor memory device formed on a main surface of a semiconductor substrate, comprising first to sixth regions arranged on said main surface in a matrix of three rows and two columns, each region being formed in a quadrangle, said first to third regions being arranged in a first column, said fourth to sixth regions being arranged in a second column adjacent to said first to third regions, respectively,
Dependencies are inferred from the claim text.