Liquid crystal display device capable of reducing the influence of parasitic capacities

A liquid crystal display device, in which a plurality of pixels forming a display screen are arranged in a matrix form and in which all pixels forming a pixel line are connected with a signal wire for each of the pixel lines,

• wherein an interval between pixel electrodes on each pixel line, as well as an interval between a pixel electrode disposed on each pixel line and the signal wire which is adjacent to the pixel electrode, are expanded so that a parasitic capacity applied to each pixel electrode does not affect an image display, and wherein:
• said pixel uses an MIM element which is connected with the pixel electrode in series, as a switching element, and
• each parasitic capacity is not more than 5% with regard to an element capacity:
• the parasitic capacity appearing between pixel electrodes on each pixel line, and
• the parasitic capacity appearing between the pixel electrode disposed on each pixel line and the signal wire which is adjacent to the pixel electrode.

A liquid crystal display device, in which a plurality of pixels forming a display screen are arranged in a matrix form and in which all pixels forming a pixel line are connected with a signal wire for each of the pixel lines, comprising at least one of:

• a first dummy wire which is formed on an outside of a final pixel line with no neighboring pixel other than a signal wire being connected with the final pixel line, and which applies to a pixel electrode disposed on the final pixel line the same amount of parasitic capacity as a between-line parasitic capacity which is applied from a neighboring signal wire, and
• a second dummy wire which is formed on the outside of the pixel disposed on both ends of the pixel lines being connected with said respective signal wires, and which applies to the pixel electrode of the pixel disposed on both ends the same amount of parasitic capacity as the between-pixel parasitic capacity which is applied from the neighboring pixel electrode,
• wherein the between-line parasitic capacity or the between-pixel parasitic, capacity is arranged so as to be uniform for each pixel electrode, and
• with regard to a parasitic capacity which is not added by the dummy wires, the parasitic capacity applied to each pixel electrode is reduced so as not to have an adverse effect on a display image by sufficiently expanding an interval between pixel electrodes on each pixel line or by sufficiently expanding an interval between the pixel electrode disposed on each line and the signal wire which is adjacent to the pixel electrode;
• and wherein:
• said pixel uses an MIM element which is connected with the pixel electrode in series, as a switching element, and
• each parasitic capacity is not more than 5% with regard to an element capacity:
• the parasitic capacity appearing between pixel electrodes on each pixel line, and
• the parasitic capacity appearing between the pixel electrode disposed on each pixel line and the signal wire which is adjacent to the pixel electrode.