Sleep mode VDD detune for power reduction

Abstract

The leakage current on a semiconductor is reduced while the semiconductor is in a sleep mode. This is accomplished by (1) placing the semiconductor in the sleep mode; (2) providing the semiconductor an internal supply voltage derived from an external supply voltage applied to the semiconductor chip (where the internal supply voltage is less in quantity than the external supply voltage); and (3) reducing the internal supply voltage when the semiconductor enters the sleep mode from an activated mode and returning the internal supply voltage to an activated mode level when the semiconductor returns to the activated mode. The reducing step includes supplying the external supply voltage to a reference circuit which outputs therefrom a reference voltage; and supplying the reference voltage to a regulator, where the regulator attempts to match the reference voltage and outputs therefrom the internal supply voltage. The reference circuit reduces the reference voltage when the semiconductor enters the sleep mode from an activated mode and returns the reference voltage to the activated mode level when the semiconductor returns to the activated mode. The reducing step can be performed by reducing the current flow to one or more diodes in the reference circuit when the semiconductor enters the sleep mode from the activated mode, and increasing the current flow to the diodes when the semiconductor reenters the activated mode from the sleep mode.

Dependencies are inferred from the claim text.