Low operating power, high voltage ringing switch circuit
AssigneeAgere Systems Guardian Corp.
InventorDean M. Umberger
Life of this patent
Estimating the term…
Abstract
An integrated ringing access switch circuit for telecommunications switching applications that provides improved dV/dt sensitivity at low operating power by using a pilot controlled rectifier, such as an SCR, that conducts at low ringing signal currents and operates to steer a bias current for causing a relatively larger controlled rectifier in parallel therewith to become conductive during higher load current operation. Also included is circuitry for preventing inadvertent turn-on of the SCRs in response to transient signals.
Claims18
A solid state switch circuit which can be implemented in an integrated circuit, comprising:
- at least one pair of parallel semiconductor devices comprised of controlled rectifiers connected together such that the conductive state of one of the controlled rectifiers of said pair controls the conductive state of the other controlled rectifier of said pair, and thus becoming sequentially conductive, said pair of controlled rectifiers each having anode and cathode current conducting electrodes and at least one current control gate electrode,
- wherein said one controlled rectifier comprises a relatively low load current carrying pilot controlled rectifier and said other controlled rectifier comprises a relatively large load current carrying controlled rectifier,
- a load circuit connected across the anode and cathode electrodes of said pair of controlled rectifiers via a pair of output terminals whereby a load current flows in the load circuit when one or both of said pair of controlled rectifiers are in a conductive state,
- a bias supply circuit connected to the pilot controlled rectifier so as to connect a bias voltage to the gate electrode thereof, rendering it conductive in response to a switch turn-on signal applied to an input terminal and causing a first load current of a first value to flow therethrough via respective anode and cathode electrodes thereof, said first load current being used to generate a turn-on voltage signal applied to the gate electrode of said other controlled rectifier so as to render it conductive and causing a second load current of a second value greater than said first value of load current to then flow therethrough via respective anode and cathode electrodes thereof concurrently with the first load current through said pilot controlled rectifier.
A solid state switch adapted for telecommunications switching applications and residing in an integrated circuit, comprising:
- two pairs of parallel semiconductor devices comprised of controlled rectifiers connected in mutually opposite polarity sense across a pair of output terminals, one pair of controlled rectifiers of said two pairs of controlled rectifiers becoming conductive for a first polarity of voltage across said output terminals, and the other pair of controlled rectifiers of said two pairs of controlled rectifiers becoming conductive for a second polarity of voltage across said switch output terminals,
- each said pair of controlled rectifiers including first and second controlled rectifiers connected together in parallel such that the conductive state of the first controlled rectifier of each said pair of controlled rectifiers controls the conductive state of the second controlled rectifier of said pair of controlled rectifiers and thereby becoming sequentially conductive,
- wherein the first controlled rectifier of each said pair comprises a relatively low load current carrying pilot controlled rectifier and the second controlled rectifier comprises a relatively large load current carrying controlled rectifier,
- a load circuit connected to said pair of output terminals whereby a load current flows in the load circuit when said first controlled rectifier of one pair of said controlled rectifiers initially becomes conductive followed by said second controlled rectifier of said pair of controlled rectifiers conductive state,
- a bias supply circuit connected to the pilot controlled rectifier of both pairs of controlled rectifiers for connecting a source of bias voltage to a gate control electrode thereof and depending upon the polarity of voltage across said output terminals, rendering the first controlled rectifier of one of said pairs of controlled rectifiers conductive in response to a switch turn-on signal applied to an input terminal and causing a first load current of a first value to flow therethrough, said first load current being used to generate a turn-on voltage signal applied to a gate control electrode of the second controlled rectifier of said one pair of controlled rectifiers sequentially rendering it conductive and causing a second load current of a second value greater than said first value of load current of the pilot controlled rectifier to then flow through the second controlled rectifier thereof concurrently with the first load current in the pilot controlled rectifier.
Dependencies are inferred from the claim text.