Level converting method and circuit having an intermediate voltage level range and a clamping circuit

A level converting circuit which is interposed between a first logic circuit operating on a first logic signal and a second logic circuit operating on a second logic signal which differs from said first logic signal in terms of voltage level range, for converting in level said first logic signal output from said first logic circuit to said second logic signal and then supplying said second logic signal to said second logic circuit, said level converting circuit comprising:

• a first level shifting circuit which has an input end thereof connected to an output end of said first logic circuit, for shifting in level a first logic signal input to said input end from said first logic circuit, to a signal in an intermediate voltage level range which does not reach a voltage level range of said second logic signal and then outputting said signal to an output end thereof;
• a clamp circuit connected to an output end of said first level shifting circuit, for clamping, if said second logic signal which corresponds to a signal in said intermediate voltage level range output to said output end reaches such a signal level as to deteriorate operating performance of said second logic circuit, said signal in said intermediate voltage level range to a predetermined voltage level so set as to be less than said signal level,
• a second level shifting circuit which has an input end thereof connected to said output end of said first level shifting circuit, for shifting in level said signal in said intermediate voltage level range output to said output end, to said second logic signal and then supplying said second logic signal to said output end;
• and
• a power supply circuit for supplying a second voltage necessary for outputting said second logic signal at a terminating resistor connected to an output end of said second level shifting circuit, via said terminating resistor to an output end of said second logic circuit.