Asynchronous logic with intermediate value between data and null values

A switching element implementing a switching-logic relationship between at least two signals comprising:

• a. an input receiving at least two input signals, where each input signal may, at various times, assume any one of a plurality of signal values, at least one of said values being a DATA value having a switching-logic-relationship meaning, another of said values being a NULL value having no switching-logic-relationship meaning, and another of said values being an INTERMEDIATE value that is distinct from the DATA and NULL values and has no switching-logic-relationship meaning;
• b. an output generating an output signal, where the output signal may, at various times, assume any one of a plurality of values, at least one of said values being a DATA value having a switching-logic-relationship meaning, and another of said values being a NULL value having no switching-logic-relationship meaning;
• c. a switching locus responsive to the input signals and generating the output signal according to transform rules;
• d. wherein the transform rules prescribe that the output signal switch to a DATA value in accordance with a switching-logic relationship of input DATA values when a logically complete number of input signals has assumed DATA values;
• e. wherein the transform rules prescribe that the output signal switch to the NULL value when all input signals have assumed the NULL value;
• and
• f. wherein the transform rules prescribe that the output signal does not switch to either the DATA value or to the NULL value when (i) at least one input signal has assumed a non-NULL value and (ii) fewer than a logically complete number of input signals has assumed DATA values.

A switching element implementing a switching-logic relationship between at least two signals comprising:

• a. an input receiving at least two input signals, where (i) each input signal may, at various times, assume any one of a plurality of values, at least one of said values being a DATA value having a switching-logic-relationship meaning, another of said values being a NULL value having no switching-logic-relationship meaning, and another of said values being an INTERMEDIATE value that is distinct from the DATA and NULL values and has no switching-logic-relationship meaning, and (ii) said DATA, INTERMEDIATE and NULL values are encoded onto a number of signal lines that is less than the number of values;
• b. an output generating an output signal, where the output signal may, at various times, assume any one of a plurality of signal values, at least one of said values being a DATA value having a switching-logic-relationship meaning, and another of said values being a NULL value having no switching-logic-relationship meaning;
• c. a switching locus responsive to the input signals and generating an output signal according to transform rules;
• d. wherein the transform rules prescribe that the output signal switch to a DATA value in accordance with a switching-logic relationship of input DATA values;
• e. wherein the transform rules prescribe that the output signal switch to the NULL value when all input signals have assumed the NULL value;
• and
• f. wherein the transform rules prescribe that the output signal does not switch to either the DATA value or to the NULL value when (i) at least one input signal has assumed a non-NULL value and (ii) fewer than a logically complete number of input signals has assumed DATA values.

A method for processing logic signals comprising:

• a. providing a plurality of input signals to a switching locus, where each input signal may, various times, assume any one of a plurality of values, at least one of said values being a DATA value having a switching-logic-relationship meaning, another of said values being a NULL value having no switching-logic-relationship meaning, and another of said values being an INTERMEDIATE value that is distinct from the DATA and NULL values and has no switching-logic-relationship meaning;
• b. generating an output signal at the switching locus, where the output signal may, at various times, assume any one of a plurality of values, at least one of said values being a DATA value having a switching-logic-relationship meaning, and another of said values being a NULL value having no switching-logic-relationship meaning;
• c. switching the output signal in accordance with input signals according to transform rules;
• d. wherein the transform rules prescribe that the output signal switch to a DATA value in accordance with a switching-logic relationship of input DATA values when all input signals have assumed a DATA value;
• e. wherein the transform rules prescribe that the output signal switch to the NULL value when all input signals have assumed the NULL value;
• and
• f. wherein the transform rules prescribe that the output signal not switch to either the DATA value or to the NULL value when any of the input signals has assumed the INTERMEDIATE value.

A method for processing logic signals comprising:

• a. providing a plurality of input signals to a switching locus, where each input signal may, at various times, assume one of a plurality of signal values, at least one of said values being a DATA value having a switching-logic-relationship meaning, another of said values being a NULL value having no switching-logic-relationship meaning, and another of said values being an INTERMEDIATE value that is distinct from the DATA and NULL values and has no switching-logic-relationship meaning;
• b. generating an output signal at the switching locus, where the output signal may, at various times, assume any one of a plurality of values, at least one of said values being a DATA value having a switching-logic-relationship meaning, and another of said values being a NULL value having no switching-logic-relationship meaning;
• c. switching the output signal in accordance with input signals according to transform rules;
• d. wherein the transform rules prescribe that the output signal switch to a DATA value in accordance with a switching-logic relationship of input DATA values when a logically complete number of input signals has assumed DATA values;
• e. wherein the transform rules prescribe that the output signal switch to the NULL value when all input signals have assume the NULL value;
• and
• f. wherein the transform rules prescribe that the output signal does not switch to either the DATA value or to the NULL value when (i) at least one input signal has assumed a non-NULL value and (ii) fewer than a logically complete number of input signals has assumed DATA values.

A method for processing logic signals comprising:

• a. providing a plurality of input signals to a switching locus, where (i) each input signal may, at various times, assume any one of a plurality of values, at least one of said values being a DATA value having a switching-logic-relationship meaning, another of said values being a NULL value having no switching-logic-relationship meaning, and another of said values being an INTERMEDIATE value that is distinct from the DATA and NULL values and has no switching-logic-relationship meaning, and (ii) said DATA, INTERMEDIATE and NULL values are encoded onto a number of signal lines that is less than the number of values;
• b. generating an output signal at the switching location, where the output signal may, at various times, assume any one of a plurality of values, at least one of said values being a DATA value having a switching-logic-relationship meaning, and another of said values being a NULL value having no switching-logic-relationship meaning;
• c. switching the output signal in accordance with input signals according to transform rules;
• d. wherein the transform rules prescribe that the output signal switch to a DATA value in accordance with a switching-logic relationship of input DATA values when a logically complete number of input signals has assumed DATA values;
• e. wherein the transform rules prescribe that the output signal switch to the NULL value when all input signals have assumed the NULL value;
• and
• f. wherein the transform rules prescribe that the output signal does not switch to either the DATA value or to the NULL value when (i) at least one input signal has assumed a non-NULL value and (ii) fewer than a logically complete number of input signals has assumed DATA values.