Semiconductor device manufacturing method and semiconductor device
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorsKatsuomi Shiozawa, Syuichi Ueno, Yasuyoshi Itoh
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AssigneeMitsubishi Denki Kabushiki Kaisha
InventorsKatsuomi Shiozawa, Syuichi Ueno, Yasuyoshi Itoh
Estimating the term…
A semiconductor device and manufacturing method capable of forming shallow extension regions in insulated-gate transistors. A side wall material containing about 1 to 20% of phosphorus, such as PSG, is deposited on the sides of an opening to a film thickness of tens of nanometers to about 100 nm and etched back to form phosphorus-containing side walls respectively adjacent to boron-containing side walls. An interlayer insulating film of silicon nitride etc. is then formed on the silicon nitride film. A thermal process performed during formation of the interlayer insulating film forms N-type extension regions in the NMOS region through a diffusion where phosphorus contained in the phosphorus-containing side walls serves as the diffusion source and P-type extension region in the PMOS region through a diffusion where boron contained in the boron-containing side walls serves as the diffusion source.
A semiconductor device having an insulated-gate transistor of a first conductivity type, said semiconductor device comprising:
Dependencies are inferred from the claim text.