Semiconductor integrated circuit device equipped with power make-up circuit used in burn-in test after packaging and method for testing the same
AssigneeNEC Corporation
InventorSatoshi Tamaki
Life of this patent
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Abstract
There is a possibility that user brings a semiconductor dynamic random access memory device to a burn- in test after packaging, and a power transfer circuit is connected between an external pin and an internal power supply line, wherein the power transfer circuit discriminates an external high power voltage from other lower voltages so as connect the external pin to the internal power supply line, thereby allowing the user to carry out the burn-in test at a high speed.
Claims18
A semiconductor integrated circuit device comprising
- a first external pin applicable with an external standard power voltage when said semiconductor integrated circuit device forms a part of an electric system,
- a first step-up circuit connected to said first external pin and produces a first internal high power voltage from said external standard power voltage,
- internal circuits connected through an internal power supply line to said first step-up circuit so as to be powered with said first internal high power voltage,
- a second external pin applicable with an external high power voltage higher than said external standard power voltage in a test carried out after completion of a fabrication of said semiconductor integrated circuit device, and
- a power transfer circuit connected between said second external pin and said internal power supply line and discriminating a request for said test so as to connect said second external pin to said internal power supply line in said test.
The semiconductor integrated circuit device as set forth in 2, in which a transistor serves as said switching element.
The semiconductor integrated circuit device as set forth in 9, in which a transistor serves as said switching element.
Dependencies are inferred from the claim text.