Wafer-scale package structure and circuit board attached thereto
AssigneeNitto Denko Corporation
InventorsYasushi Inoue, Masakazu Sugimoto, Megumu Nagasawa, Takuji Okeyui, Kei Nakamura
Life of this patent
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Abstract
A wafer-scale package structure in which a circuit board for rearranging electrode pads of a wafer is laminated on the wafer integrally. The circuit board can be divided into individual chip-size packages (CSPS) and which includes a layer of polyimide resin, and connection between the wafer and the circuit board is performed by solder bump, while the circuit board is stuck on the wafer with an adhesive.
Claims14
A wafer-scale package structure comprising:
- a wafer having electrode pads;
- a circuit board being laminated on said wafer to rearrange said electrode pads of said wafer and being made of an insulating layer made from insulating resin as a main ingredient;
- an adhesive for laminating said circuit board on said wafer;
- and
- a conductive member for connecting said electrode pads of said wafer and said circuit board,
- wherein said wafer and said circuit board can be divided into individual chip-size packages simultaneously, and
- wherein said insulating layer includes a metal foil.
A wafer-scale package structure comprising:
- a wafer having electrode pads;
- a circuit board being laminated on said wafer to rearrange said electrode pads of said wafer and being made of an insulating layer made from insulating resin as a main ingredient;
- an adhesive for laminating said circuit board on said wafer;
- and
- a conductive member for connecting said electrode pads of said wafer and said circuit board,
- wherein said wafer and said circuit board can be divided into individual chip-size packages simultaneously, and
- wherein said conductive member comprises solder.
A circuit board to be laminated on a wafer to thereby form a wafer-scale package structure to rearrange electrode pads of the wafer, said circuit board comprising:
- an insulating layer made from insulating resin as a main ingredient;
- a circuit formed on said insulating layer;
- and
- a conductive member for connecting the electrode pads of the wafer and said circuit, said conductive member being formed on electrode portions of said circuit corresponding to the electrode pads of the wafer to make connections between said electrode portions of said circuit and the electrode pads of the wafer,
- wherein said insulating layer includes a metal foil.
A circuit board to be laminated on a wafer to thereby form a wafer-scale package structure to rearrange electrode pads of the wafer, said circuit board comprising:
- an insulating layer made from insulating resin as a main ingredient;
- a circuit formed on said insulating layer;
- and
- a conductive member for connecting the electrode pads of the wafer and said circuit, said conductive member being formed on electrode portions of said circuit corresponding to the electrode pads of the wafer to make connections between said electrode portions of said circuit and the electrode pads of the wafer,
- wherein said conductive member comprises solder.
Dependencies are inferred from the claim text.