Method for minimizing the temperature coefficient of resistance of passive resistors in an integrated circuit process flow

A method for minimizing the temperature coefficient of resistance of a semiconductor resistor as a part of a process of fabricating a semiconductor integrated circuit which comprises the steps of:

• (a) providing a partially fabricated integrated circuit having a first dielectric surface region;
• (b) forming a semiconductor resistor body on said surface region, said resistor body having one of a positive or negative temperature coefficient of resistance;
• (c) forming a mask over said semiconductor resistor body;
• (d) forming an aperture through said mask at at least one end region of said resistor body extending to said end region of said resistor body;
• (e) forming a resistor head extending through said aperture, said resistor head consisting essentially of an electrical path and interface to and from the resistor body and in contact with the resistor body, said resistor head having the other of a positive or negative temperature coefficient of resistance which is substantially equal to the temperature coefficient of resistance of said resistor body to offset temperature changes of resistance of said resistor body;
• and
• (f) completing fabrication of said semiconductor integrated circuit.