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US 6,333,236 B1Granted
Semiconductor device and method for manufacturing same
AssigneeNEC Corporation
InventorHirosada Koganei
Life of this patent
Estimating the term…
Abstract
In a hetero-junction bipolar transistor, an undoped Al0.7Ga0.3As stopper layer 5 having good etching controllability is provided on a base layer 4, thereby forming a base without etching damage, this resulting in achievement of the desired base resistance with good repeatability.
Claims3
A method for fabricating a hetero-junction bipolar transistor comprising the steps of:
- a first step of forming an n-type GaAs sub-collector layer, an n-type GaAs collector layer, a p-type GaAs base layer, an undoped AlXGa1−XAs stopper layer with a value X of 0.7 to 1.0, an n-type AlYGa1−YAs emitter layer with a value Y of 0 to 0.4, an n-type GaAs emitter contact layer on a semi-insulating GaAs substrate in this sequence;
- a second step of forming a resist layer on said n-type GaAs emitter contact layer and patterning said resist layer;
- a third step of etching said n-type GaAs emitter contact layer and said n-type AlYGa1−YAs emitter layer using said resist layer and a first etching fluid with said undoped AlXGa1−XAs stopper layer as an etching stopper, so as to form an n-type GaAs emitter contact and an n-type AlYGa1−YAs emitter, and expose a surface of said undoped AlXGa1−XAs stopper layer;
- and
- a fourth step of removing said exposed undoped AlXGa1−XAs A stopper layer so as to expose a surface of said p-type GaAs base layer using a second etching fluid.
2 more elements
Dependencies are inferred from the claim text.