Semiconductor device with self-aligned contact and its manufacture

A method of manufacturing a semiconductor device comprising the steps of:

• (a) forming a gate insulating film on a plurality of active regions of a semiconductor substrate;
• (b) forming a plurality of first gate electrode structures having a high pattern density on said gate insulating film in a first area and a plurality of second gate electrode structures having a low pattern density on said gate insulating film in a second area, said high pattern density being higher than said low pattern density;
• (c) forming a pair of source/drain regions with a first impurity concentration in said semiconductor substrate on both sides of each of said first and second gate electrode structures;
• (d) forming a first insulating film over the semiconductor substrate, the first insulating film covering the first and second gate electrode structures;
• (e) forming a second insulating film on said first insulating film, said second insulating film having etching characteristics different from the first insulating film;
• (f) introducing impurity with a second impurity concentration higher than said first impurity concentration in said semiconductor substrate on both sides of said second gate electrode structures by masking said first area, after forming said first and second insulating film,
• (g) forming an interlayer insulating film over said semiconductor substrate, said interlayer insulating film covering said first area and having etching characteristics different from said second insulating film, after introducing said impurity in step (f);
• and
• (h) forming an opening through said interlayer insulating film and said first and second insulating films in the first area in a self-alignment manner, said opening reaching one of said source/drain regions and the inner wall of said opening being defined by said first insulating film formed on said side surfaces of the first gate electrode structures.

A method of manufacturing a semiconductor device comprising the steps of:

• (a) forming a gate insulating film on a plurality of active regions of a semiconductor substrate;
• (b) forming a plurality of first gate electrode structures having a high pattern density on said gate insulating film in a first area and a plurality of second gate electrode structures having a low pattern density on said gate insulating film in a second area, said high pattern density being higher than said low pattern density;
• (c) forming a pair of source/drain regions in said semiconductor substrate on both sides of each of said first and second gate electrode structures;
• (d) forming a first insulating film over the semiconductor substrate, the first insulating film covering the first and second gate electrode structures;
• (e) anisotropically etching said first insulating films in said second area and leaving side spacers on the side surfaces of said second gate electrode structure, by masking said first area,
• (f) forming a mask layer with a first opening, on the area between said plurality of first gate electrode structure covered with said first insulating film, said first opening larger than the space of said adjacent first gate electrode structure, then anisotropically etching said first insulating film using said mask layer;
• and forming a second opening in a self-alignment manner, said second opening reaching one of said source/drain regions between said adjacent first gate electrode structure.