Back to results
US 6,333,205 B1Granted
CMOS imager with selectively silicided gates
AssigneeMicron Technology, Inc.
InventorHoward E. Rhodes
Life of this patent
Estimating the term…
Abstract
The invention also relates to an apparatus and method for selectively providing a silicide coating over the transistor gates of a CMOS imager to improve the speed of the transistor gates. The method further includes an apparatus and method for forming a self aligned photo shield over the CMOS imager.
Claims54
A method of forming a CMOS imager, comprising the steps of:
- forming an insulating layer over a semiconductor substrate having a photo-collection region;
- forming at least one transistor gate over a portion of said insulating layer;
- forming an opaque conductive layer over said photo-collection region, said at least one transistor gate and said insulating layer;
- and
- selectively removing said opaque conductive layer from said insulating layer and said photo-collection region.
2 more elements
A method of forming a CMOS imager, comprising the steps of:
- forming an insulating layer over a semiconductor substrate having a doped photocollection region;
- depositing a doped polysilicon layer over said insulating layer;
- depositing a photocollection insulator over said photocollection region;
- forming an opaque conductive layer over said doped polysilicon layer;
- and
- patterning said imager to form at least one gate stack having said opaque conductive layer over said gate stack.
3 more elements
Dependencies are inferred from the claim text.