Method of making a cavity ball grid array apparatus

A method of manufacturing a semiconductor die package, comprising:

• providing a base layer of dielectric material including at least one conductive element site on a lower surface thereof, at least one conductive via extending from said at least one conductive element site to an upper surface of said base layer, and at least one conductive trace on said upper surface of said base layer having one end electrically connected to said at least one conductive via and an opposing end;
• securing a dielectric layer of material to said upper surface of said base layer, said dielectric layer including at least one conductive path extending therethrough and further including a cavity extending about a die-attach area on said upper surface of said base layer, said opposing end of said at least one conductive trace extending into said cavity and terminating at a bond end adjacent said die-attach area;
• and
• securing a conductive reference plane layer to said dielectric layer, said conductive reference plane layer including an aperture therethrough extending about said cavity in said dielectric layer, said at least one conductive path electrically connecting said conductive reference plane layer to said at least one conductive via in said base layer.

A method of making a semiconductor die package, comprising:

• forming a plurality of conductive vias in a base layer of dielectric material, each conductive via of said plurality of conductive vias including a lower end terminating proximate a lower surface of said base layer and extending through said base layer to an upper end terminating proximate an upper surface of said base layer;
• forming a plurality of conductive element sites on said lower surface of said base layer, each conductive element site of said plurality of conductive element sites directly contacting said lower end of one conductive via of said plurality of conductive vias;
• forming a plurality of conductive traces on said upper surface of said base layer, each conductive trace of said plurality of conductive traces including one end directly contacting said upper end of one conductive via of said plurality of conductive vias extending to an opposing end terminating at a bond located adjacent a die-attach area on said upper surface of said base layer;
• applying a dielectric layer of material to at least a portion of said upper surface of said base layer, said dielectric layer including at least one conductive path extending from a lower surface thereof to an upper surface thereof and further including a cavity extending therethrough and about said die-attach area on said upper surface of said base layer;
• and
• applying a conductive reference plane layer to said upper surface of said dielectric layer electrically connected to said upper end of at least one conductive via of said plurality of conductive vias in said base layer by said at least one conductive path, said conductive reference plane layer extending about said cavity in said dielectric layer and extending over at least a portion of said upper surface of said dielectric layer.