Method and apparatus for using CRC for data integrity in on-chip memory
AssigneeSeagate Technology LLC
InventorJudy Lynn Westby
Life of this patent
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AssigneeSeagate Technology LLC
InventorJudy Lynn Westby
Estimating the term…
Cyclic-redundancy-code (“CRC”) information that is received along with a frame from a fiber-channel is stored in an on-chip frame buffer, and later checked to ensure the integrity of the data while in the frame buffer. In various embodiments, data frames, along with their CRC information, are stored into a data-frame buffer, and/or non-data frames along with their CRC information are stored into a receive-non-data-frame buffer. The improved communications channel system includes a channel node having dual ports, each port supporting a fiber-channel arbitrated-loop serial communications channel. The serial communications channels each include CRC on data transmissions on the channel, an on-chip frame memory located on-chip in the channel node that receives a data frame and the frame's associated CRC from the communications channel, and an integrity apparatus that later uses the received associated CRC for data-integrity checking of data in the on-chip frame memory. In addition, a method for using CRC for data integrity in on-chip memory is described.
A communications channel system for using fibre-channel cyclic-redundancy code (CRC) for data integrity in an on-chip memory comprising:
A disc drive comprising:
A communications method comprising steps of:
A communications channel system comprising:
Dependencies are inferred from the claim text.