Method and apparatus for address paging emulation

A method for address paging emulation, the method comprises the steps of:

• a) producing an extended logical address in response to a memory access request, wherein the extended logical address includes a logical address and an address extension;
• b) determining, based on the logical address, whether an entry exists for the memory access request in a translation look aside table;
• c) when an entry does not exist for the memory access request in the translation look aside table, providing the extended logical address to an exception handler;
• and
• d) generating, by the exception handler, a translation look aside table entry for the memory access request, wherein said exception handler determines whether the translation look aside table entry identifies reserved memory, and when the translation look aside table entry identifies the reserved memory, alters, when the memory access request is not a system special operation, the translation look aside table entry to produce a modified translation look aside table entry that is not identifying the reserved memory.

An address paging emulator comprises:

• a processing module;
• and
• memory operably coupled to the processing module, wherein the memory stores operational instructions that cause the processing module to (a) produce an extended logical address in response to a memory access request, wherein the extended logical address includes a logical address and an address extension;
• (b) determine, based on the logical address, whether an entry exists for the memory access request in a translation look aside table;
• (c) providing the extended logical address to a plurality of exception handlers when an entry does not exist for the memory access request in the translation look aside table;
• (d) identify one of the plurality of exception handlers to process the extended logical address;
• (e) generate, as the one of the plurality of exception handlers, a translation look aside table entry for the memory access request;
• (f) determine whether the translation look aside table entry is identifying reserved memory;
• and (g) alter, when the memory access request is not a system special operation, the translation look aside table entry to produce a modified translation look aside table entry that is not identifying the reserved memory when the translation look aside table entry is identifying the reserved memory.

An address paging emulator comprises:

• a processing module;
• and
• memory operably coupled to the processing module, wherein the memory stores operational instructions that cause the processing module to (a) produce an extended logical address in response to a memory access request, wherein the extended logical address includes a logical address and an address extension;
• (b) determine, based on the logical address, whether an entry exists for the memory access request in a translation look aside table;
• (c) generate a translation look aside table entry for the memory access request when an entry does not exist for the memory access request in the translation look aside table;
• (d) determine whether the translation look aside table entry is identifying reserved memory;
• and (e) alter, when the memory access request is not a system special operation, the translation look aside table entry to produce a modified translation look aside table entry that is not identifying the reserved memory when the translation look aside table entry is identifying the reserved memory.